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[Qemu-devel] [PATCH 05/27] Implement missing parts of the logic for the
From: |
David Gibson |
Subject: |
[Qemu-devel] [PATCH 05/27] Implement missing parts of the logic for the POWER PURR |
Date: |
Fri, 1 Apr 2011 15:15:12 +1100 |
The PURR (Processor Utilization Resource Register) is a register found
on recent POWER CPUs. The guts of implementing it at least enough to
get by are already present in qemu, however some of the helper
functions needed to actually wire it up are missing.
This patch adds the necessary glue, so that the PURR can be wired up
when we implement newer POWER CPU targets which include it.
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/helper.h | 1 +
target-ppc/op_helper.c | 7 +++++++
target-ppc/translate_init.c | 8 ++++++++
3 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 1a69cf8..2b4744d 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -376,6 +376,7 @@ DEF_HELPER_0(load_601_rtcu, tl)
#if !defined(CONFIG_USER_ONLY)
#if defined(TARGET_PPC64)
DEF_HELPER_1(store_asr, void, tl)
+DEF_HELPER_0(load_purr, tl)
#endif
DEF_HELPER_1(store_sdr1, void, tl)
DEF_HELPER_1(store_tbl, void, tl)
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c
index bdb1f17..aa2e8ba 100644
--- a/target-ppc/op_helper.c
+++ b/target-ppc/op_helper.c
@@ -86,6 +86,13 @@ target_ulong helper_load_atbu (void)
return cpu_ppc_load_atbu(env);
}
+#if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
+target_ulong helper_load_purr (void)
+{
+ return (target_ulong)cpu_ppc_load_purr(env);
+}
+#endif
+
target_ulong helper_load_601_rtcl (void)
{
return cpu_ppc601_load_rtcl(env);
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 7c08b1c..bca85d5 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -251,6 +251,14 @@ static void spr_write_atbu (void *opaque, int sprn, int
gprn)
{
gen_helper_store_atbu(cpu_gpr[gprn]);
}
+
+#if defined(TARGET_PPC64)
+__attribute__ (( unused ))
+static void spr_read_purr (void *opaque, int gprn, int sprn)
+{
+ gen_helper_load_purr(cpu_gpr[gprn]);
+}
+#endif
#endif
#if !defined(CONFIG_USER_ONLY)
--
1.7.1
- [Qemu-devel] [PATCH 06/27] Correct ppc popcntb logic, implement popcntw and popcntd, (continued)
- [Qemu-devel] [PATCH 17/27] Implement assorted pSeries hcalls and RTAS methods, David Gibson, 2011/04/01
- [Qemu-devel] [PATCH 08/27] Parse SDR1 on mtspr instead of at translate time, David Gibson, 2011/04/01
- [Qemu-devel] [PATCH 13/27] Start implementing pSeries logical partition machine, David Gibson, 2011/04/01
- [Qemu-devel] [PATCH 15/27] Virtual hash page table handling on pSeries machine, David Gibson, 2011/04/01
- [Qemu-devel] [PATCH 16/27] Implement hcall based RTAS for pSeries machines, David Gibson, 2011/04/01
- [Qemu-devel] [PATCH 25/27] Add a PAPR TCE-bypass mechanism for the pSeries machine, David Gibson, 2011/04/01
- [Qemu-devel] [PATCH 05/27] Implement missing parts of the logic for the POWER PURR,
David Gibson <=
- [Qemu-devel] [PATCH 22/27] Implement sPAPR Virtual LAN (ibmveth), David Gibson, 2011/04/01
- [Qemu-devel] [PATCH 14/27] Implement the bus structure for PAPR virtual IO, David Gibson, 2011/04/01
- [Qemu-devel] [PATCH 09/27] Use "hash" more consistently in ppc mmu code, David Gibson, 2011/04/01
- [Qemu-devel] [PATCH 19/27] Add PAPR H_VIO_SIGNAL hypercall and infrastructure for VIO interrupts, David Gibson, 2011/04/01
- [Qemu-devel] [PATCH 18/27] Implement the PAPR (pSeries) virtualized interrupt controller (xics), David Gibson, 2011/04/01
- [Qemu-devel] [PATCH 20/27] Add (virtual) interrupt to PAPR virtual tty device, David Gibson, 2011/04/01
- [Qemu-devel] [PATCH 07/27] Clean up slb_lookup() function, David Gibson, 2011/04/01
- [Qemu-devel] [PATCH 10/27] Better factor the ppc hash translation path, David Gibson, 2011/04/01
- [Qemu-devel] [PATCH 23/27] Implement PAPR CRQ hypercalls, David Gibson, 2011/04/01
- [Qemu-devel] [PATCH 24/27] Implement PAPR virtual SCSI interface (ibmvscsi), David Gibson, 2011/04/01