Re: [Qemu-devel] [RFC] Memory API

[Jan Kiszka]

On 2011-05-18 21:10, Anthony Liguori wrote:
> On 05/18/2011 10:30 AM, Jan Kiszka wrote:
>> On 2011-05-18 17:17, Peter Maydell wrote:
>>> On 18 May 2011 16:11, Jan Kiszka<address@hidden>  wrote:
>>>> On 2011-05-18 16:36, Avi Kivity wrote:
>>>>> There is nothing we can do with a return code.  You can't fail an mmio
>>>>> that causes overlapping physical memory map.
>>>>
>>>> We must fail such requests to make progress with the API. That may
>>>> happen either on caller side or in cpu_register_memory_region itself
>>>> (hwerror). Otherwise the new API will just be a shiny new facade for on
>>>> old and still fragile building.
>>>
>>> If we don't allow overlapping regions, then how do you implement
>>> things like "on startup board maps ROM into lower addresses
>>> over top of devices, but later it is unmapped and you can see
>>> the underlying devices" ? (You can't currently do this AFAIK,
>>> and it would be nice if the new API supported it.)
>>
>> Right, we can't do this properly, and that's why the attempt if the
>> i440fx chipset model is so horribly broken ATM.
>>
>> Just allowing overlapping does not solve this problem either. It does
>> not specify what region is on top and what is below (even worse if
>> multiple regions overlap at the place).
>>
>> We need some managing instance here, and that is e.g. the chipset that
>> provide control over the overlap in reality. It could hook up a
>> PhysMemClient to receive and redirect updates to subregions, or only
>> allow to register them in disabled state.
> 
> I think that gets ugly pretty fast.  The way this works IRL is that all
> I/O dispatches pass through the chipset.  You literally need something
> as simple as:
> 
> static void i440fx_io_intercept(void *opaque, uint64_t addr, uint32_t
> value, int size, MemRegion *next)
> {
>     I440FX *s = opaque;
> 
>     if (range_overlaps(addr, size, PAM_REGION)) {
>         ...
>     } else {
>         dispatch_io(next, addr, value, size);
>     }
> }
> 
> There's no need for an explicit intercept mechanism if you make multiple
> levels have their own dispatch tables and register progressively larger
> regions.  In fact....

Actually, things are a bit more complicated: This layer has to properly
adopt the coalescing properties of underlying regions or we cause
performance regressions to VGA emulation. That means it has to register
dispatching slots of the corresponding size and set the coalescing flag
accordingly. And it likely need to adjust them as the regions below change.

IOW, I don't think we get away with that simple approach above but still
require to track mapping via a PhysMemClient. But we should be able to
avoid filtering by adding overlapping regions with higher prio.

Jan

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