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[Qemu-devel] [RHEL6 qemu-kvm PATCH 05/11] cpu defs: use Intel flag names
From: |
Eduardo Habkost |
Subject: |
[Qemu-devel] [RHEL6 qemu-kvm PATCH 05/11] cpu defs: use Intel flag names for Intel models |
Date: |
Thu, 2 Jun 2011 16:13:04 -0300 |
Use 'i64' instead of 'lm' and 'xd' instead of 'nx' on Intel models.
The flags have different names on Intel docs, so use those names for clarity.
This is based on a previous patch from John Cooper where this was introduced
with many other changes at the same time. Original John's patch submission is
at Message-ID: <address@hidden>,
<http://marc.info/?l=qemu-devel&m=130618871926030>.
Signed-off-by: Eduardo Habkost <address@hidden>
---
sysconfigs/target/target-x86_64.conf | 6 +++---
target-i386/cpuid.c | 4 ++--
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/sysconfigs/target/target-x86_64.conf
b/sysconfigs/target/target-x86_64.conf
index a0df33c..fd4e421 100644
--- a/sysconfigs/target/target-x86_64.conf
+++ b/sysconfigs/target/target-x86_64.conf
@@ -9,7 +9,7 @@
stepping = "3"
feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc
pse de fpu mtrr clflush mca pse36"
feature_ecx = "sse3 ssse3 x2apic"
- extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu
lm syscall nx"
+ extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu
i64 syscall xd"
extfeature_ecx = "lahf_lm"
xlevel = "0x8000000A"
model_id = "Intel Celeron_4x0 (Conroe/Merom Class Core 2)"
@@ -23,7 +23,7 @@
stepping = "3"
feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc
pse de fpu mtrr clflush mca pse36"
feature_ecx = "sse3 cx16 ssse3 sse4.1 x2apic"
- extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu
lm syscall nx"
+ extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu
i64 syscall xd"
extfeature_ecx = "lahf_lm"
xlevel = "0x8000000A"
model_id = "Intel Core 2 Duo P9xxx (Penryn Class Core 2)"
@@ -37,7 +37,7 @@
stepping = "3"
feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc
pse de fpu mtrr clflush mca pse36"
feature_ecx = "sse3 cx16 ssse3 sse4.1 sse4.2 popcnt x2apic"
- extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu
lm syscall nx"
+ extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu
i64 syscall xd"
extfeature_ecx = "lahf_lm"
xlevel = "0x8000000A"
model_id = "Intel Core i7 9xx (Nehalem Class Core i7)"
diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c
index c151f12..fc72f7b 100644
--- a/target-i386/cpuid.c
+++ b/target-i386/cpuid.c
@@ -57,9 +57,9 @@ static const char *ext2_feature_name[] = {
"cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall",
"mtrr", "pge", "mca", "cmov",
"pat", "pse36", NULL, NULL /* Linux mp */,
- "nx" /* Intel xd */, NULL, "mmxext", "mmx",
+ "nx|xd", NULL, "mmxext", "mmx",
"fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp",
- NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow",
+ NULL, "lm|i64", "3dnowext", "3dnow",
};
static const char *ext3_feature_name[] = {
"lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD
ExtApicSpace */,
--
1.7.3.2
- [Qemu-devel] [RHEL6 qemu-kvm PATCH 00/11] cpu model bug fixes and definition corrections (v2), Eduardo Habkost, 2011/06/02
- [Qemu-devel] [RHEL6 qemu-kvm PATCH 02/11] Allow an optional qemu_early_init_vcpu(), Eduardo Habkost, 2011/06/02
- [Qemu-devel] [RHEL6 qemu-kvm PATCH 05/11] cpu defs: use Intel flag names for Intel models,
Eduardo Habkost <=
- [Qemu-devel] [RHEL6 qemu-kvm PATCH 08/11] reorder cpuid feature bits on target-x86_64.conf, Eduardo Habkost, 2011/06/02
- [Qemu-devel] [RHEL6 qemu-kvm PATCH 04/11] Support -readconfig "?" to debug config file loading, Eduardo Habkost, 2011/06/02
- [Qemu-devel] [RHEL6 qemu-kvm PATCH 03/11] Add kvm emulated x2apic flag to config defined cpu models (v2), Eduardo Habkost, 2011/06/02
- [Qemu-devel] [RHEL6 qemu-kvm PATCH 01/11] correct archaic CPU model "model" field for Intel CPUs., Eduardo Habkost, 2011/06/02
- [Qemu-devel] [RHEL6 qemu-kvm PATCH 09/11] cpu defs: add pse36, mca, mtrr to AMD CPU definitions, Eduardo Habkost, 2011/06/02
- [Qemu-devel] [RHEL6 qemu-kvm PATCH 10/11] add Westmere as a qemu cpu model, Eduardo Habkost, 2011/06/02
- [Qemu-devel] [RHEL6 qemu-kvm PATCH 07/11] cpu defs: uncomment empty extfeatures_ecx definition for Opteron_G1, Eduardo Habkost, 2011/06/02
- [Qemu-devel] [RHEL6 qemu-kvm PATCH 11/11] add "default" pseudo CPU model name, Eduardo Habkost, 2011/06/02
- [Qemu-devel] [RHEL6 qemu-kvm PATCH 06/11] cpu defs: remove replicated flags from Intel, Eduardo Habkost, 2011/06/02
- Re: [Qemu-devel] [PATCH 00/11] cpu model bug fixes and definition corrections (v2), Eduardo Habkost, 2011/06/02