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[Qemu-devel] [PATCH 04/28] PPC: Fix IPI support in MPIC
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PATCH 04/28] PPC: Fix IPI support in MPIC |
Date: |
Sat, 23 Jul 2011 12:49:48 +0200 |
The current IPI support in the MPIC code is incomplete and doesn't work. This
code adds proper support for IPIs in MPIC by using the IDE register to remember
which CPUs IPIs are still outstanding to. New triggers through the IPI trigger
register only add to the list of CPUs we want to IPI.
Signed-off-by: Alexander Graf <address@hidden>
---
v1 -> v2:
- Use MAX_IPI instead of hardcoded 4
Signed-off-by: Alexander Graf <address@hidden>
---
hw/openpic.c | 17 +++++++++++++++--
1 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/hw/openpic.c b/hw/openpic.c
index ad45331..9ac3b3d 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -57,7 +57,7 @@
#define MAX_MBX 4
#define MAX_TMR 4
#define VECTOR_BITS 8
-#define MAX_IPI 0
+#define MAX_IPI 4
#define VID (0x00000000)
@@ -840,7 +840,9 @@ static void openpic_cpu_write_internal(void *opaque,
target_phys_addr_t addr,
case 0x60:
case 0x70:
idx = (addr - 0x40) >> 4;
- write_IRQreg(opp, opp->irq_ipi0 + idx, IRQ_IDE, val);
+ /* we use IDE as mask which CPUs to deliver the IPI to still. */
+ write_IRQreg(opp, opp->irq_ipi0 + idx, IRQ_IDE,
+ opp->src[opp->irq_ipi0 + idx].ide | val);
openpic_set_irq(opp, opp->irq_ipi0 + idx, 1);
openpic_set_irq(opp, opp->irq_ipi0 + idx, 0);
break;
@@ -934,6 +936,17 @@ static uint32_t openpic_cpu_read_internal(void *opaque,
target_phys_addr_t addr,
reset_bit(&src->ipvp, IPVP_ACTIVITY);
src->pending = 0;
}
+
+ if ((n_IRQ >= opp->irq_ipi0) && (n_IRQ < (opp->irq_ipi0 +
MAX_IPI))) {
+ src->ide &= ~(1 << idx);
+ if (src->ide && !test_bit(&src->ipvp, IPVP_SENSE)) {
+ /* trigger on CPUs that didn't know about it yet */
+ openpic_set_irq(opp, n_IRQ, 1);
+ openpic_set_irq(opp, n_IRQ, 0);
+ /* if all CPUs knew about it, set active bit again */
+ set_bit(&src->ipvp, IPVP_ACTIVITY);
+ }
+ }
}
break;
case 0xB0: /* PEOI */
--
1.6.0.2
- Re: [Qemu-devel] [PATCH 21/28] PPC: E500: Add PV spinning code, (continued)
- [Qemu-devel] [PATCH 18/28] PPC: KVM: Add stubs for kvm helper functions, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 11/28] device tree: add nop_node, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 05/28] PPC: Set MPIC IDE for IPI to 0, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 28/28] PPC: E500: Bump CPU count to 15, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 25/28] device tree: give dt more size, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 03/28] PPC: Extend MPIC MMIO range, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 24/28] device tree: dont fail operations, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 04/28] PPC: Fix IPI support in MPIC,
Alexander Graf <=
- [Qemu-devel] [PATCH 02/28] PPC: Add CPU local MMIO regions to MPIC, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 23/28] device tree: add add_subnode command, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 22/28] PPC: E500: Update cpu-release-addr property in cpu nodes, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 17/28] PPC: KVM: Remove kvmppc_read_host_property, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 07/28] PPC: MPIC: Fix CI bit definitions, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 27/28] MPC8544DS: Generate CPU nodes on init, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 10/28] PPC: E500: Generate IRQ lines for many CPUs, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 16/28] PPC: bamboo: Use kvm api for freq and clock frequencies, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 15/28] PPC: E500: Remove mpc8544_copy_soc_cell, Alexander Graf, 2011/07/23
- [Qemu-devel] [PATCH 20/28] PPC: E500: Remove unneeded CPU nodes, Alexander Graf, 2011/07/23