[Qemu-devel] [PATCH 055/111] m68k: Correct bfclr in register case.

[Bryce Lanham]

From: Laurent Vivier <address@hidden>

Apply a "not" on the mask to really clear bits with the "and"...
(as it is done for bfclr in the memory case)

Signed-off-by: Laurent Vivier <address@hidden>
---
 target-m68k/translate.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index e0c6fa3..f93ad02 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -2769,6 +2769,7 @@ DISAS_INSN(bitfield_reg)
         tcg_gen_sar_i32(reg2, reg2, width);
         break;
     case 4: /* bfclr */
+        tcg_gen_not_i32(mask, mask);
         tcg_gen_and_i32(reg, reg, mask);
         break;
     case 5: /* bfffo */
-- 
1.7.2.3