Re: [Qemu-devel] Improve QEMU performance with LLVM codegen and other techniques

[Alexander Graf]

On 04.12.2011, at 07:14, 陳韋任 wrote:

>>> 3. Then a trace composed of TCG blocks is sent to a LLVM translator. The 
>>> translator
>>>  generates the host binary for the trace into a LLVM code cache, and patch 
>>> the
>> 
>> I don't fully understand this part. Do you disassemble the x86 blob that TCG 
>> emitted?
> 
>  We ask TCG to disassemble the guest binary where the trace beginning with
> _again_ to get a set of TCG blocks, then sent them to the LLVM translator.

So you have two TCG backends? One to generate real host code and one that goes 
into your LLVM generator?

> 
>>> the moment (make the situation simpler), I think we still don't have to 
>>> check
>>> the blocks' hflags and segment descriptors in the trace to see if they 
>>> match.
>> 
>> Yeah. You only need to be sync'ed with the invalidation then. And make sure 
>> you patch the TB atomically, so you don't have a separate thread 
>> accidentally run half your code and half the old code.
> 
>  Sync'ed with the invalidation means tb_flush, cpu_unlink and 
> tb_phys_invalidate?

Yup :)


Alex