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[Qemu-devel] [PATCH 5/6] msi: Invoke msi/msix_write_config from PCI core
From: |
Jan Kiszka |
Subject: |
[Qemu-devel] [PATCH 5/6] msi: Invoke msi/msix_write_config from PCI core |
Date: |
Sun, 4 Dec 2011 14:22:13 +0100 |
From: Jan Kiszka <address@hidden>
Also this functions is better invoked by the core than by each and every
device. This allows to drop the config_write callbacks from ich and
intel-hda.
CC: Alexander Graf <address@hidden>
CC: Gerd Hoffmann <address@hidden>
CC: Isaku Yamahata <address@hidden>
Signed-off-by: Jan Kiszka <address@hidden>
---
hw/ide/ich.c | 8 --------
hw/intel-hda.c | 12 ------------
hw/ioh3420.c | 1 -
hw/msi.c | 2 +-
hw/pci.c | 3 +++
hw/virtio-pci.c | 2 --
hw/xio3130_downstream.c | 1 -
hw/xio3130_upstream.c | 1 -
8 files changed, 4 insertions(+), 26 deletions(-)
diff --git a/hw/ide/ich.c b/hw/ide/ich.c
index 3f7510f..a470c01 100644
--- a/hw/ide/ich.c
+++ b/hw/ide/ich.c
@@ -139,13 +139,6 @@ static int pci_ich9_uninit(PCIDevice *dev)
return 0;
}
-static void pci_ich9_write_config(PCIDevice *pci, uint32_t addr,
- uint32_t val, int len)
-{
- pci_default_write_config(pci, addr, val, len);
- msi_write_config(pci, addr, val, len);
-}
-
static PCIDeviceInfo ich_ahci_info[] = {
{
.qdev.name = "ich9-ahci",
@@ -154,7 +147,6 @@ static PCIDeviceInfo ich_ahci_info[] = {
.qdev.vmsd = &vmstate_ahci,
.init = pci_ich9_ahci_init,
.exit = pci_ich9_uninit,
- .config_write = pci_ich9_write_config,
.vendor_id = PCI_VENDOR_ID_INTEL,
.device_id = PCI_DEVICE_ID_INTEL_82801IR,
.revision = 0x02,
diff --git a/hw/intel-hda.c b/hw/intel-hda.c
index 10769e0..995d895 100644
--- a/hw/intel-hda.c
+++ b/hw/intel-hda.c
@@ -1158,17 +1158,6 @@ static int intel_hda_exit(PCIDevice *pci)
return 0;
}
-static void intel_hda_write_config(PCIDevice *pci, uint32_t addr,
- uint32_t val, int len)
-{
- IntelHDAState *d = DO_UPCAST(IntelHDAState, pci, pci);
-
- pci_default_write_config(pci, addr, val, len);
- if (d->msi) {
- msi_write_config(pci, addr, val, len);
- }
-}
-
static int intel_hda_post_load(void *opaque, int version)
{
IntelHDAState* d = opaque;
@@ -1252,7 +1241,6 @@ static PCIDeviceInfo intel_hda_info = {
.qdev.reset = intel_hda_reset,
.init = intel_hda_init,
.exit = intel_hda_exit,
- .config_write = intel_hda_write_config,
.vendor_id = PCI_VENDOR_ID_INTEL,
.device_id = 0x2668,
.revision = 1,
diff --git a/hw/ioh3420.c b/hw/ioh3420.c
index fc2fb3b..886ede8 100644
--- a/hw/ioh3420.c
+++ b/hw/ioh3420.c
@@ -71,7 +71,6 @@ static void ioh3420_write_config(PCIDevice *d,
pci_get_long(d->config + d->exp.aer_cap + PCI_ERR_ROOT_COMMAND);
pci_bridge_write_config(d, address, val, len);
- msi_write_config(d, address, val, len);
ioh3420_aer_vector_update(d);
pcie_cap_slot_write_config(d, address, val, len);
pcie_aer_write_config(d, address, val, len);
diff --git a/hw/msi.c b/hw/msi.c
index 137dba0..c4e8a6e 100644
--- a/hw/msi.c
+++ b/hw/msi.c
@@ -256,7 +256,7 @@ void msi_notify(PCIDevice *dev, unsigned int vector)
stl_le_phys(address, data);
}
-/* call this function after updating configs by pci_default_write_config(). */
+/* Normally called by pci_default_write_config(). */
void msi_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, int len)
{
uint16_t flags = pci_get_word(dev->config + msi_flags_off(dev));
diff --git a/hw/pci.c b/hw/pci.c
index 5d5829d..8c814cd 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -1056,6 +1056,9 @@ void pci_default_write_config(PCIDevice *d, uint32_t
addr, uint32_t val, int l)
if (range_covers_byte(addr, l, PCI_COMMAND))
pci_update_irq_disabled(d, was_irq_disabled);
+
+ msi_write_config(d, addr, val, l);
+ msix_write_config(d, addr, val, l);
}
/***********************************************************/
diff --git a/hw/virtio-pci.c b/hw/virtio-pci.c
index 16a5b08..d21a7ee 100644
--- a/hw/virtio-pci.c
+++ b/hw/virtio-pci.c
@@ -492,8 +492,6 @@ static void virtio_write_config(PCIDevice *pci_dev,
uint32_t address,
virtio_set_status(proxy->vdev,
proxy->vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK);
}
-
- msix_write_config(pci_dev, address, val, len);
}
static unsigned virtio_pci_get_features(void *opaque)
diff --git a/hw/xio3130_downstream.c b/hw/xio3130_downstream.c
index 464eefa..8e9117d 100644
--- a/hw/xio3130_downstream.c
+++ b/hw/xio3130_downstream.c
@@ -41,7 +41,6 @@ static void xio3130_downstream_write_config(PCIDevice *d,
uint32_t address,
pci_bridge_write_config(d, address, val, len);
pcie_cap_flr_write_config(d, address, val, len);
pcie_cap_slot_write_config(d, address, val, len);
- msi_write_config(d, address, val, len);
pcie_aer_write_config(d, address, val, len);
}
diff --git a/hw/xio3130_upstream.c b/hw/xio3130_upstream.c
index 0d8d254..707401e 100644
--- a/hw/xio3130_upstream.c
+++ b/hw/xio3130_upstream.c
@@ -40,7 +40,6 @@ static void xio3130_upstream_write_config(PCIDevice *d,
uint32_t address,
{
pci_bridge_write_config(d, address, val, len);
pcie_cap_flr_write_config(d, address, val, len);
- msi_write_config(d, address, val, len);
pcie_aer_write_config(d, address, val, len);
}
--
1.7.3.4
[Qemu-devel] [PATCH 6/6] msi: Generalize msix_supported to msi_supported, Jan Kiszka, 2011/12/04
[Qemu-devel] [PATCH 5/6] msi: Invoke msi/msix_write_config from PCI core,
Jan Kiszka <=
[Qemu-devel] [PATCH 3/6] msi: Use msi/msix_present more consistently, Jan Kiszka, 2011/12/04