+
+/*
+ * There are five CMUs:
+ *
+ * CMU_LEFTBUS
+ * CMU_RIGHTBUS
+ * CMU_TOP
+ * CMU_DMC
+ * CMU_CPU
+ *
+ * each of them uses 16KB address space for SFRs
+ *
+ * + 0x4000 because SFR region for CMUs starts at 0x10030000,
+ * but the first CMU (CMU_LEFTBUS) starts with this offset
+ *
+ */
+#define EXYNOS4210_CMU_REGS_MEM_SIZE (0x4000 * 5 + 0x4000)
It seems a bit unlikely to me that there's really a single indivisble
bit of hardware with 23 kilobytes worth of register area. Is there
a better way of structuring this so that there are a number of
sub-memory-regions that cover this space each with their own
read/write functions (and perhaps with their own state structs)?
(eg instantiate five CPUs at the right locations.)