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[Qemu-devel] [PATCH 2/4] target-mips: Enable 64 bit user mode
From: |
khansa |
Subject: |
[Qemu-devel] [PATCH 2/4] target-mips: Enable 64 bit user mode |
Date: |
Tue, 3 Jan 2012 09:49:25 +0500 |
From: Khansa Butt <address@hidden>
MIPS_HFLAG_UX is included in env->hflags so that the address computation
for LD instruction does not get treated as 32 bit code, see gen_op_addr_add()
in translate.c.
Signed-off-by: Khansa Butt <address@hidden>
---
target-mips/translate.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index d5b1c76..cecdacc 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -12773,6 +12773,9 @@ void cpu_reset (CPUMIPSState *env)
#if defined(CONFIG_USER_ONLY)
env->hflags = MIPS_HFLAG_UM;
+#ifdef TARGET_MIPS64
+ env->hflags |= MIPS_HFLAG_UX;
+#endif
/* Enable access to the SYNCI_Step register. */
env->CP0_HWREna |= (1 << 1);
if (env->CP0_Config1 & (1 << CP0C1_FP)) {
--
1.7.3.4