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[Qemu-devel] [PATCH v6 1/1] arm: add dummy v7 cp15 registers
From: |
Mark Langsdorf |
Subject: |
[Qemu-devel] [PATCH v6 1/1] arm: add dummy v7 cp15 registers |
Date: |
Wed, 4 Jan 2012 10:53:09 -0600 |
Add dummy register support for the cp15, CRn=c15 registers.
config_base_register and power_control_register currently
default to 0, but may have improved support after the QOM
CPU patches are finished.
Signed-off-by: Mark Langsdorf <address@hidden>
---
Changes from v5
Added handling for all c15 registers
Changes from v3, v4
None
Changes from v2
Added test against op2
Changes from v1
renamed the register
added comments about how it will change when QOM CPUs are added
target-arm/cpu.h | 2 ++
target-arm/helper.c | 30 ++++++++++++++++++++++++++++++
2 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index c4d742f..f8fb558 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -149,6 +149,8 @@ typedef struct CPUARMState {
uint32_t c15_i_max; /* Maximum D-cache dirty line index. */
uint32_t c15_i_min; /* Minimum D-cache dirty line index. */
uint32_t c15_threadid; /* TI debugger thread-ID. */
+ uint32_t c15_config_base_address; /* SCU base address. */
+ uint32_t c15_power_control; /* power control */
} cp15;
struct {
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 65f4fbf..f39bcf3 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2111,6 +2111,36 @@ uint32_t HELPER(get_cp15)(CPUState *env, uint32_t insn)
* 0x200 << ($rn & 0xfff), when MMU is off. */
goto bad_reg;
}
+ if (ARM_CPUID(env) == ARM_CPUID_CORTEXA9) {
+ switch (crm) {
+ case 0:
+ if ((op1 == 4) && (op2 == 0)) {
+ /* The config_base_address should hold the value of
+ * the peripheral base. ARM should get this from a CPU
+ * object property, but that support isn't available in
+ * December 2011. Default to 0 for now and board models
+ * that care can set it by a private hook */
+ return env->cp15.c15_config_base_address;
+ } else if ((op1 == 0) && (op2 == 0)) {
+ /* power_control should be set to maximum latency. Again,
+ default to 0 and set by private hook */
+ return env->cp15.c15_power_control;
+ }
+ break;
+ case 1: /* NEON Busy */
+ return 0;
+ case 5: /* tlb lockdown */
+ case 6:
+ case 7:
+ if ((op1 == 5) && (op2 == 2)) {
+ return 0;
+ }
+ break;
+ default:
+ break;
+ }
+ goto bad_reg;
+ }
return 0;
}
bad_reg:
--
1.7.5.4
- Re: [Qemu-devel] [PATCH v5 3/7] arm: add dummy v7 cp15 config_base_register, Peter Maydell, 2012/01/04
- Re: [Qemu-devel] [PATCH v5 3/7] arm: add dummy v7 cp15 config_base_register, Mark Langsdorf, 2012/01/04
- Re: [Qemu-devel] [PATCH v5 3/7] arm: add dummy v7 cp15 config_base_register, Peter Maydell, 2012/01/04
- [Qemu-devel] [PATCH v6 1/1] arm: add dummy v7 cp15 registers,
Mark Langsdorf <=
- Re: [Qemu-devel] [PATCH v6 1/1] arm: add dummy v7 cp15 registers, Peter Maydell, 2012/01/04
- Re: [Qemu-devel] [PATCH v6 1/1] arm: add dummy v7 cp15 registers, Mark Langsdorf, 2012/01/04
- [Qemu-devel] [PATCH v7] arm: add dummy v7 cp15 registers, Mark Langsdorf, 2012/01/04
- Re: [Qemu-devel] [PATCH v7] arm: add dummy v7 cp15 registers, Peter Maydell, 2012/01/04
- [Qemu-devel] [PATCH v8] arm: add dummy v7 cp15 registers, Mark Langsdorf, 2012/01/04
- Re: [Qemu-devel] [PATCH v8] arm: add dummy v7 cp15 registers, Peter Maydell, 2012/01/04
- Re: [Qemu-devel] [PATCH v8] arm: add dummy v7 cp15 registers, Mark Langsdorf, 2012/01/04
- Re: [Qemu-devel] [PATCH v8] arm: add dummy v7 cp15 registers, Peter Maydell, 2012/01/05
- [Qemu-devel] [PATCH v9] arm: add dummy v7 cp15 registers, Mark Langsdorf, 2012/01/05
- Re: [Qemu-devel] [PATCH v9] arm: add dummy v7 cp15 registers, Peter Maydell, 2012/01/05