Re: [Qemu-devel] Get only TCG code without execution

[陳韋任]

On Fri, Jan 20, 2012 at 09:09:46AM +0000, Peter Maydell wrote:
> On 20 January 2012 06:12, 陳韋任 <address@hidden> wrote:
> >  Out of curiosity. What's ARM memory model? From the Wikipedia [1], it seems
> > ARMv7 has the same memory model as IA64.
> 
> The ARM memory model is the set of semantics for memory
> accesses as defined in the ARM Architecture Reference
> Manual (covering not just reordering but also exclusive
> accesses, alignment, barriers, etc). The manual devotes
> 50 pages to it so I'm not about to try to summarise it here :-)

  Seems the Wikipedia only lists the memory ordering part. ;)
 
> > And as a general emulator, QEMU shouldn't implement any
> > architecture-specific memory model, right?
> 
> Wrong, at least in theory. Ideally QEMU should implement exactly
> the semantics required by the guest architecture memory model
> (it's allowed to be stricter than the architecture requires, of
> course), in the same way it should implement the semantics required
> by the guest architecture instruction set. A guest binary for ARM
> can rely on the memory ordering constraints imposed by the memory
> model just as much as it can rely on the fact that the ADD instruction
> adds two registers together. In practice, of course (a) this is an
> enormous amount of work and also slows the emulator down drastically
> and (b) guest binaries don't actually rely that much on the memory
> model. And the fairly strict memory model provided by x86 means that
> for x86 hosts we actually get most of the important bits of the guest
> memory model right anyway.

  AFAIK, LLVM defines it's own memory model [1] which is inspired by the C++11
memory model. That's why I think instead of implementing architecture-specific
memory model, QEMU should define a more general (strict) one.

  You said,

  "guest binaries don't actually rely that much on the memory model."

I think the reason is those guest binaries are single thread. Memory model is
important in multi-threaded case. BTW, our binary translator now can translate
x86 binary to ARM binary, and ARM has weaker memory model than x86.
 
[1] http://llvm.org/docs/LangRef.html#memmodel

Regards,
chenwj

P.S. Happy Chinese New Year. :)

-- 
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj