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Re: [Qemu-devel] [SeaBIOS] [PATCH 4/6] Mapping of BARs and Bridge region
From: |
Gerd Hoffmann |
Subject: |
Re: [Qemu-devel] [SeaBIOS] [PATCH 4/6] Mapping of BARs and Bridge regions |
Date: |
Fri, 02 Mar 2012 08:21:32 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:10.0.1) Gecko/20120216 Thunderbird/10.0.1 |
On 03/01/12 23:01, Alexey Korolev wrote:
> On 01/03/12 22:22, Gerd Hoffmann wrote:
>> On 03/01/12 07:57, Alexey Korolev wrote:
>>> In pci_bios_map_regions() we try to reserve memory for
>>> all entries of root bus regions.
>>> If pci_bios_init_root_regions() fails - e.g no enough space, we create two
>>> new pci_regions:
>>> r64pref, r64mem and migrate all entries which are 64bit capable to them.
>>> Migration process
>>> is very simple: delete the entry from one list add to another.
>> It isn't that simple. There are a bunch of constrains. First the
>> bridge must be 64bit capable. All bridges up to the root bus in case of
>> nested bridges. Second all other prefmem bars of devices behind the
>> bridge must be 64bit capable too. Again, in case of nested bridges this
>> applies to all devices behind the toplevel bridge.
> It must be simple as we derive 64bit flag from devices behind the bridge at
> the stage of building topology.
>
> In other words if the entry at the stage of mapping has 64bit flag it means
> that the entry and all
> the entries behind it are 64bit capable.
>
> + for (i = (MaxPCIBus + 1) * PCI_REGION_TYPE_COUNT ; i < 0; i--) {
> + .................
> + is64bit = this_entry->is64bit;
> + size = 0;
> + foreach_region_entry(®ions[i-1], entry) {
> + size += entry->size;
> + is64bit &= entry->is64bit;
> + }
> .................
> + this_entry->is64bit = is64bit;
This pass looks at the children and clears the is64bit in the parent in
case one of the children isn't 64bit capable.
I think you need a second pass here, clearing the is64bit in all
children in case the parent has is64bit cleared.
cheers,
Gerd
[Qemu-devel] [PATCH 5/6] Delete old code, Alexey Korolev, 2012/03/01
[Qemu-devel] [PATCH 6/6] 64bit PCI range in _CRS table, Alexey Korolev, 2012/03/01
Re: [Qemu-devel] [SeaBIOS] [Seabios] [PATCH 0/6] 64bit PCI BARs allocations (take 2), Gerd Hoffmann, 2012/03/01
Re: [Qemu-devel] [Seabios] [PATCH 0/6] 64bit PCI BARs allocations (take 2), Kevin O'Connor, 2012/03/04