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[Qemu-devel] [PATCH RFC v4 41/44] sparc hw/: Don't use CPUState
From: |
Andreas Färber |
Subject: |
[Qemu-devel] [PATCH RFC v4 41/44] sparc hw/: Don't use CPUState |
Date: |
Sat, 10 Mar 2012 03:28:13 +0100 |
Scripted conversion:
for file in hw/sun4m.c hw/sun4u.c hw/grlib.h hw/leon3.c; do
sed -i "s/CPUState/CPUSPARCState/g" $file
done
Signed-off-by: Andreas Färber <address@hidden>
---
hw/grlib.h | 2 +-
hw/leon3.c | 8 ++++----
hw/sun4m.c | 12 ++++++------
hw/sun4u.c | 24 ++++++++++++------------
4 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/hw/grlib.h b/hw/grlib.h
index fdf4b11..e1c4137 100644
--- a/hw/grlib.h
+++ b/hw/grlib.h
@@ -42,7 +42,7 @@ void grlib_irqmp_ack(DeviceState *dev, int intno);
static inline
DeviceState *grlib_irqmp_create(target_phys_addr_t base,
- CPUState *env,
+ CPUSPARCState *env,
qemu_irq **cpu_irqs,
uint32_t nr_irqs,
set_pil_in_fn set_pil_in)
diff --git a/hw/leon3.c b/hw/leon3.c
index 1dc5a02..0a5ff16 100644
--- a/hw/leon3.c
+++ b/hw/leon3.c
@@ -42,14 +42,14 @@
#define MAX_PILS 16
typedef struct ResetData {
- CPUState *env;
+ CPUSPARCState *env;
uint32_t entry; /* save kernel entry in case of reset */
} ResetData;
static void main_cpu_reset(void *opaque)
{
ResetData *s = (ResetData *)opaque;
- CPUState *env = s->env;
+ CPUSPARCState *env = s->env;
cpu_state_reset(env);
@@ -65,7 +65,7 @@ void leon3_irq_ack(void *irq_manager, int intno)
static void leon3_set_pil_in(void *opaque, uint32_t pil_in)
{
- CPUState *env = (CPUState *)opaque;
+ CPUSPARCState *env = (CPUSPARCState *)opaque;
assert(env != NULL);
@@ -101,7 +101,7 @@ static void leon3_generic_hw_init(ram_addr_t ram_size,
const char *initrd_filename,
const char *cpu_model)
{
- CPUState *env;
+ CPUSPARCState *env;
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *prom = g_new(MemoryRegion, 1);
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 4045740..7bcbf37 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -228,7 +228,7 @@ void sun4m_irq_info(Monitor *mon)
slavio_irq_info(mon, slavio_intctl);
}
-void cpu_check_irqs(CPUState *env)
+void cpu_check_irqs(CPUSPARCState *env)
{
if (env->pil_in && (env->interrupt_index == 0 ||
(env->interrupt_index & ~15) == TT_EXTINT)) {
@@ -253,7 +253,7 @@ void cpu_check_irqs(CPUState *env)
}
}
-static void cpu_kick_irq(CPUState *env)
+static void cpu_kick_irq(CPUSPARCState *env)
{
env->halted = 0;
cpu_check_irqs(env);
@@ -262,7 +262,7 @@ static void cpu_kick_irq(CPUState *env)
static void cpu_set_irq(void *opaque, int irq, int level)
{
- CPUState *env = opaque;
+ CPUSPARCState *env = opaque;
if (level) {
trace_sun4m_cpu_set_irq_raise(irq);
@@ -281,7 +281,7 @@ static void dummy_cpu_set_irq(void *opaque, int irq, int
level)
static void main_cpu_reset(void *opaque)
{
- CPUState *env = opaque;
+ CPUSPARCState *env = opaque;
cpu_state_reset(env);
env->halted = 0;
@@ -289,7 +289,7 @@ static void main_cpu_reset(void *opaque)
static void secondary_cpu_reset(void *opaque)
{
- CPUState *env = opaque;
+ CPUSPARCState *env = opaque;
cpu_state_reset(env);
env->halted = 1;
@@ -809,7 +809,7 @@ static TypeInfo ram_info = {
static void cpu_devinit(const char *cpu_model, unsigned int id,
uint64_t prom_addr, qemu_irq **cpu_irqs)
{
- CPUState *env;
+ CPUSPARCState *env;
env = cpu_init(cpu_model);
if (!env) {
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 8b043f2..c32eddb 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -243,7 +243,7 @@ static unsigned long sun4u_load_kernel(const char
*kernel_filename,
return kernel_size;
}
-void cpu_check_irqs(CPUState *env)
+void cpu_check_irqs(CPUSPARCState *env)
{
uint32_t pil = env->pil_in |
(env->softint & ~(SOFTINT_TIMER | SOFTINT_STIMER));
@@ -297,7 +297,7 @@ void cpu_check_irqs(CPUState *env)
}
}
-static void cpu_kick_irq(CPUState *env)
+static void cpu_kick_irq(CPUSPARCState *env)
{
env->halted = 0;
cpu_check_irqs(env);
@@ -306,7 +306,7 @@ static void cpu_kick_irq(CPUState *env)
static void cpu_set_irq(void *opaque, int irq, int level)
{
- CPUState *env = opaque;
+ CPUSPARCState *env = opaque;
if (level) {
CPUIRQ_DPRINTF("Raise CPU IRQ %d\n", irq);
@@ -320,7 +320,7 @@ static void cpu_set_irq(void *opaque, int irq, int level)
}
typedef struct ResetData {
- CPUState *env;
+ CPUSPARCState *env;
uint64_t prom_addr;
} ResetData;
@@ -344,7 +344,7 @@ void cpu_get_timer(QEMUFile *f, CPUTimer *s)
qemu_get_timer(f, s->qtimer);
}
-static CPUTimer* cpu_timer_create(const char* name, CPUState *env,
+static CPUTimer* cpu_timer_create(const char* name, CPUSPARCState *env,
QEMUBHFunc *cb, uint32_t frequency,
uint64_t disabled_mask)
{
@@ -373,7 +373,7 @@ static void cpu_timer_reset(CPUTimer *timer)
static void main_cpu_reset(void *opaque)
{
ResetData *s = (ResetData *)opaque;
- CPUState *env = s->env;
+ CPUSPARCState *env = s->env;
static unsigned int nr_resets;
cpu_state_reset(env);
@@ -396,7 +396,7 @@ static void main_cpu_reset(void *opaque)
static void tick_irq(void *opaque)
{
- CPUState *env = opaque;
+ CPUSPARCState *env = opaque;
CPUTimer* timer = env->tick;
@@ -413,7 +413,7 @@ static void tick_irq(void *opaque)
static void stick_irq(void *opaque)
{
- CPUState *env = opaque;
+ CPUSPARCState *env = opaque;
CPUTimer* timer = env->stick;
@@ -430,7 +430,7 @@ static void stick_irq(void *opaque)
static void hstick_irq(void *opaque)
{
- CPUState *env = opaque;
+ CPUSPARCState *env = opaque;
CPUTimer* timer = env->hstick;
@@ -714,9 +714,9 @@ static TypeInfo ram_info = {
.class_init = ram_class_init,
};
-static CPUState *cpu_devinit(const char *cpu_model, const struct hwdef *hwdef)
+static CPUSPARCState *cpu_devinit(const char *cpu_model, const struct hwdef
*hwdef)
{
- CPUState *env;
+ CPUSPARCState *env;
ResetData *reset_info;
uint32_t tick_frequency = 100*1000000;
@@ -755,7 +755,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
const char *initrd_filename, const char *cpu_model,
const struct hwdef *hwdef)
{
- CPUState *env;
+ CPUSPARCState *env;
M48t59State *nvram;
unsigned int i;
long initrd_size, kernel_size;
--
1.7.7
- [Qemu-devel] [PATCH RFC v4 37/44] mips hw/: Don't use CPUState, (continued)
- [Qemu-devel] [PATCH RFC v4 37/44] mips hw/: Don't use CPUState, Andreas Färber, 2012/03/09
- [Qemu-devel] [PATCH RFC v4 20/44] target-mips: Don't overuse CPUState, Andreas Färber, 2012/03/09
- [Qemu-devel] [PATCH RFC v4 28/44] m68k-semi: Don't use CPUState, Andreas Färber, 2012/03/09
- [Qemu-devel] [PATCH RFC v4 33/44] i386 hw/: Don't use CPUState, Andreas Färber, 2012/03/09
- [Qemu-devel] [PATCH RFC v4 29/44] xtensa-semi: Don't use CPUState, Andreas Färber, 2012/03/09
- [Qemu-devel] [PATCH RFC v4 31/44] arm hw/: Don't use CPUState, Andreas Färber, 2012/03/09
- [Qemu-devel] [PATCH RFC v4 10/44] linux-user: Don't overuse CPUState, Andreas Färber, 2012/03/09
- [Qemu-devel] [PATCH RFC v4 22/44] target-s390x: Don't overuse CPUState, Andreas Färber, 2012/03/09
- [Qemu-devel] [PATCH RFC v4 42/44] xtensa hw/: Don't use CPUState, Andreas Färber, 2012/03/09
- [Qemu-devel] [PATCH RFC v4 41/44] sparc hw/: Don't use CPUState,
Andreas Färber <=
- [Qemu-devel] [PATCH RFC v4 16/44] target-i386: Don't overuse CPUState, Andreas Färber, 2012/03/09
- [Qemu-devel] [PATCH RFC v4 43/44] Rename CPUState -> CPUArchState, Andreas Färber, 2012/03/09
- [Qemu-devel] [PATCH RFC v4 24/44] target-sparc: Don't overuse CPUState, Andreas Färber, 2012/03/09
- [Qemu-devel] [PATCH RFC v4 38/44] ppc hw/: Don't use CPUState, Andreas Färber, 2012/03/09
- [Qemu-devel] [PATCH RFC v4 44/44] qom: Introduce CPU class, Andreas Färber, 2012/03/09