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[Qemu-devel] [PATCH 4/7] target-unicore32: Store cp0 c0_cachetype in Uni
From: |
Andreas Färber |
Subject: |
[Qemu-devel] [PATCH 4/7] target-unicore32: Store cp0 c0_cachetype in UniCore32CPUClass |
Date: |
Wed, 14 Mar 2012 02:39:55 +0100 |
Contributed under GPLv2+.
Signed-off-by: Andreas Färber <address@hidden>
---
target-unicore32/cpu-qom.h | 1 +
target-unicore32/cpu.c | 4 ++++
target-unicore32/helper.c | 1 -
3 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/target-unicore32/cpu-qom.h b/target-unicore32/cpu-qom.h
index afe47e8..f3592d0 100644
--- a/target-unicore32/cpu-qom.h
+++ b/target-unicore32/cpu-qom.h
@@ -44,6 +44,7 @@ typedef struct UniCore32CPUClass {
struct {
uint32_t c0_cpuid;
+ uint32_t c0_cachetype;
} cp0;
} UniCore32CPUClass;
diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c
index b89a1c6..c17b880 100644
--- a/target-unicore32/cpu.c
+++ b/target-unicore32/cpu.c
@@ -17,12 +17,14 @@
typedef struct UniCore32CPUInfo {
const char *name;
uint32_t cp0_c0_cpuid;
+ uint32_t cp0_c0_cachetype;
} UniCore32CPUInfo;
static const UniCore32CPUInfo uc32_cpus[] = {
{
.name = "UniCore-II",
.cp0_c0_cpuid = 0x40010863,
+ .cp0_c0_cachetype = 0x1dd20d2,
},
{
.name = "any",
@@ -40,6 +42,7 @@ static void uc32_cpu_initfn(Object *obj)
cpu_exec_init(env);
env->cpu_model_str = object_get_typename(obj);
env->cp0.c0_cpuid = klass->cp0.c0_cpuid;
+ env->cp0.c0_cachetype = klass->cp0.c0_cachetype;
env->uncached_asr = ASR_MODE_USER;
env->regs[31] = 0;
@@ -53,6 +56,7 @@ static void uc32_cpu_class_init(ObjectClass *klass, void
*data)
const UniCore32CPUInfo *info = data;
k->cp0.c0_cpuid = info->cp0_c0_cpuid;
+ k->cp0.c0_cachetype = info->cp0_c0_cachetype;
}
static void uc32_register_cpu(const UniCore32CPUInfo *info)
diff --git a/target-unicore32/helper.c b/target-unicore32/helper.c
index 44b7842..5e5e34d 100644
--- a/target-unicore32/helper.c
+++ b/target-unicore32/helper.c
@@ -35,7 +35,6 @@ CPUUniCore32State *uc32_cpu_init(const char *cpu_model)
set_feature(env, UC32_HWCAP_CMOV);
set_feature(env, UC32_HWCAP_UCF64);
env->ucf64.xregs[UC32_UCF64_FPSCR] = 0;
- env->cp0.c0_cachetype = 0x1dd20d2;
env->cp0.c1_sys = 0x00090078;
break;
case UC32_CPUID_ANY: /* For userspace emulation. */
--
1.7.7
- Re: [Qemu-devel] [PATCH RFC v4 02/20] target-arm: Introduce QOM ARMCPUClass, (continued)
- [Qemu-devel] [PATCH RFC v4 14/20] target-arm: Store VFP MVFR0 and MVFR1 in ARMCPUClass, Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 12/20] target-arm: Move the PXA270's iwMMXt reset to pxa270_reset(), Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 11/20] target-arm: Drop JTAG_ID documentation, Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 16/20] target-arm: Store CCSIDRs in ARMCPUClass, Andreas Färber, 2012/03/10
- [Qemu-devel] [PATCH RFC v4 06/20] target-arm: Move CPU feature flags out of CPUState, Andreas Färber, 2012/03/10
- Re: [Qemu-devel] [PATCH v4 0/3] Prepare QOM support for machines and CPU, Anthony Liguori, 2012/03/13
- [Qemu-devel] [PATCH 0/7] QOM'ify UniCore32 CPU, Andreas Färber, 2012/03/13
- [Qemu-devel] [PATCH 1/7] MAINTAINERS: Add entry for UniCore32, Andreas Färber, 2012/03/13
- [Qemu-devel] [PATCH 3/7] target-unicore32: QOM'ify CPU, Andreas Färber, 2012/03/13