[Qemu-devel] [PATCH V2 6/7] hw/dma.c: replace register_ioport*

[Julien Grall]

This patch replaces all register_ioport* with isa_register_portio_list.
It permits to use the new Memory stuff like listener.

Signed-off-by: Julien Grall <address@hidden>
---
 hw/dma.c |   55 +++++++++++++++++++++++++++++++++++++------------------
 1 files changed, 37 insertions(+), 18 deletions(-)

diff --git a/hw/dma.c b/hw/dma.c
index 0a9322d..985bfe6 100644
--- a/hw/dma.c
+++ b/hw/dma.c
@@ -473,37 +473,56 @@ static int dma_phony_handler (void *opaque, int nchan, 
int dma_pos, int dma_len)
     return dma_pos;
 }
 
+
+/* IOport for channel */
+static const MemoryRegionPortio channel_portio_list[] = {
+    { 0x00, 1, 1, .write = write_chan, .read = read_chan, },
+    PORTIO_END_OF_LIST(),
+};
+
+/* IOport from page_base */
+static const MemoryRegionPortio page_portio_list[] = {
+    { 0x01, 3, 1, .write = write_page, .read = read_page, },
+    { 0x07, 1, 1, .write = write_page, .read = read_page, },
+    PORTIO_END_OF_LIST(),
+};
+
+/* IOport from pageh_base */
+static const MemoryRegionPortio pageh_portio_list[] = {
+    { 0x01, 3, 1, .write = write_pageh, .read = read_pageh, },
+    { 0x07, 3, 1, .write = write_pageh, .read = read_pageh, },
+    PORTIO_END_OF_LIST(),
+};
+
+/* IOport for cont */
+static const MemoryRegionPortio cont_portio_list[] = {
+    { 0x00, 1, 1, .write = write_cont, .read = read_cont, },
+    PORTIO_END_OF_LIST(),
+};
+
 /* dshift = 0: 8 bit DMA, 1 = 16 bit DMA */
 static void dma_init2(struct dma_cont *d, int base, int dshift,
                       int page_base, int pageh_base,
                       qemu_irq *cpu_request_exit)
 {
-    static const int page_port_list[] = { 0x1, 0x2, 0x3, 0x7 };
     int i;
 
     d->dshift = dshift;
     d->cpu_request_exit = cpu_request_exit;
     for (i = 0; i < 8; i++) {
-        register_ioport_write (base + (i << dshift), 1, 1, write_chan, d);
-        register_ioport_read (base + (i << dshift), 1, 1, read_chan, d);
+        isa_register_portio_list(NULL, base + (i << dshift),
+                                 channel_portio_list, d, "dma-chan");
     }
-    for (i = 0; i < ARRAY_SIZE (page_port_list); i++) {
-        register_ioport_write (page_base + page_port_list[i], 1, 1,
-                               write_page, d);
-        register_ioport_read (page_base + page_port_list[i], 1, 1,
-                              read_page, d);
-        if (pageh_base >= 0) {
-            register_ioport_write (pageh_base + page_port_list[i], 1, 1,
-                                   write_pageh, d);
-            register_ioport_read (pageh_base + page_port_list[i], 1, 1,
-                                  read_pageh, d);
-        }
+
+    isa_register_portio_list(NULL, page_base, page_portio_list, d,
+                             "dma-page");
+    if (pageh_base >= 0) {
+        isa_register_portio_list(NULL, pageh_base, pageh_portio_list, d,
+                                 "dma-pageh");
     }
     for (i = 0; i < 8; i++) {
-        register_ioport_write (base + ((i + 8) << dshift), 1, 1,
-                               write_cont, d);
-        register_ioport_read (base + ((i + 8) << dshift), 1, 1,
-                              read_cont, d);
+        isa_register_portio_list(NULL, base + ((i + 8) << dshift),
+                                 cont_portio_list, d, "dma-cont");
     }
     qemu_register_reset(dma_reset, d);
     dma_reset(d);
-- 
Julien Grall