Re: [Qemu-devel] Optimization for amd CPUs without amd-v using sse2, 3, 4 instructions

[陳韋任]

On Sun, Apr 22, 2012 at 12:07:40PM +0800, 陳韋任 wrote:
> > I am using qemu to run VMs on my computer with amd chip on board.
> > However, my computer doesn't support amd-v, so the performance of the VM is 
> > low.
> > I do have experiences in optimization of program using sse technique.
> > Is it possible to speed up the qemu for those x86 chips that do not support 
> > hardware virtualization using sse instructions  ?
> > If so, I would like to contribute the the qemu community.
> 
>   Without hardware virtualization (amd-v, for example), QEMU uses binary
> translation to run your VM. That says each guest instruction executed by
> the VM is translated into TCG ops (QEMU IR), then translated into host
> instructions and executed. Perhaps you have to look at tcg/i386/*, which
> is the TCG ops -> host binary part. Or, you can look at target-i386/*,
> which is the guest binary -> TCG ops part. Currently, guest SIMD instruction
> is emulated by helper functions in scalar manner. Maybe you can try to map
> guest SIMD into host SIMD.

  Or, you can use LLVM to speedup QEMU! Just let LLVM worry about how to
generate SSE instructions. ;)

Regards,
chenwj

-- 
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj