[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH V4 0/5] Ehnahced SSI bus support + M25P80 SPI fl

From: Paul Brook
Subject: Re: [Qemu-devel] [PATCH V4 0/5] Ehnahced SSI bus support + M25P80 SPI flash + Xilinx SPI controller
Date: Wed, 6 Jun 2012 14:18:52 +0100
User-agent: KMail/1.13.7 (Linux/3.2.0-2-amd64; KDE/4.7.4; x86_64; ; )

> On 5th April, when we first RFC'd our SPI layer support, you said to Peter:
> ==
> I don't believe there is any difference between SSI and SPI.  It's the
> exact same thing - the same way that many devices support a "two-wire
> interface" that is actually just I2C with a different name.
> The behavior of the CS pin varies between devices.  It sounds like you need
> a bit of extra logic not present in the current ssi code.  You should fix
> that, not invent a whole new bus.
> ==
> He's gone and done exactly that, indeed generalised it with the
> proposed changes to SSI.

No.  There are two changes.  Modelling the CS line in the SPI bus, and having 
SSI be a multipoint bus rather than point-point.


reply via email to

[Prev in Thread] Current Thread [Next in Thread]