[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCHv4 03/14] unicore32-softmmu: Make UniCore32 cpuid & e
From: |
Guan Xuetao |
Subject: |
[Qemu-devel] [PATCHv4 03/14] unicore32-softmmu: Make UniCore32 cpuid & exceptions correct and runable |
Date: |
Fri, 13 Jul 2012 19:07:38 +0800 |
This patch initializes the cpuid to exactly correct value because
linux kernel will check it.
In addition, the exception types are specified in proper situations.
Then it could make exceptions generated correctly and timely.
Signed-off-by: Guan Xuetao <address@hidden>
---
cpu-exec.c | 1 +
linux-user/main.c | 3 ++-
target-unicore32/cpu.c | 19 ++++++++++++++-----
target-unicore32/cpu.h | 14 ++++++++------
4 files changed, 25 insertions(+), 12 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 08c35f7..500ff12 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -423,6 +423,7 @@ int cpu_exec(CPUArchState *env)
#elif defined(TARGET_UNICORE32)
if (interrupt_request & CPU_INTERRUPT_HARD
&& !(env->uncached_asr & ASR_I)) {
+ env->exception_index = UC32_EXCP_INTR;
do_interrupt(env);
next_tb = 0;
}
diff --git a/linux-user/main.c b/linux-user/main.c
index d0e0e4f..e751042 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -958,7 +958,8 @@ void cpu_loop(CPUUniCore32State *env)
}
}
break;
- case UC32_EXCP_TRAP:
+ case UC32_EXCP_DTRAP:
+ case UC32_EXCP_ITRAP:
info.si_signo = SIGSEGV;
info.si_errno = 0;
/* XXX: check env->error_code */
diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c
index de63f58..3425bbe 100644
--- a/target-unicore32/cpu.c
+++ b/target-unicore32/cpu.c
@@ -1,7 +1,7 @@
/*
* QEMU UniCore32 CPU
*
- * Copyright (c) 2010-2011 GUAN Xue-tao
+ * Copyright (c) 2010-2012 Guan Xuetao
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
* This program is free software; you can redistribute it and/or modify
@@ -32,13 +32,16 @@ static void unicore_ii_cpu_initfn(Object *obj)
UniCore32CPU *cpu = UNICORE32_CPU(obj);
CPUUniCore32State *env = &cpu->env;
- env->cp0.c0_cpuid = 0x40010863;
+ env->cp0.c0_cpuid = 0x4d000863;
+ env->cp0.c0_cachetype = 0x0d152152;
+ env->cp0.c1_sys = 0x2000;
+ env->cp0.c2_base = 0x0;
+ env->cp0.c3_faultstatus = 0x0;
+ env->cp0.c4_faultaddr = 0x0;
+ env->ucf64.xregs[UC32_UCF64_FPSCR] = 0;
set_feature(env, UC32_HWCAP_CMOV);
set_feature(env, UC32_HWCAP_UCF64);
- env->ucf64.xregs[UC32_UCF64_FPSCR] = 0;
- env->cp0.c0_cachetype = 0x1dd20d2;
- env->cp0.c1_sys = 0x00090078;
}
static void uc32_any_cpu_initfn(Object *obj)
@@ -47,6 +50,7 @@ static void uc32_any_cpu_initfn(Object *obj)
CPUUniCore32State *env = &cpu->env;
env->cp0.c0_cpuid = 0xffffffff;
+ env->ucf64.xregs[UC32_UCF64_FPSCR] = 0;
set_feature(env, UC32_HWCAP_CMOV);
set_feature(env, UC32_HWCAP_UCF64);
@@ -65,8 +69,13 @@ static void uc32_cpu_initfn(Object *obj)
cpu_exec_init(env);
env->cpu_model_str = object_get_typename(obj);
+#ifdef CONFIG_USER_ONLY
env->uncached_asr = ASR_MODE_USER;
env->regs[31] = 0;
+#else
+ env->uncached_asr = ASR_MODE_PRIV;
+ env->regs[31] = 0x03000000;
+#endif
tlb_flush(env, 1);
}
diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
index 81c14ff..d14fde5 100644
--- a/target-unicore32/cpu.h
+++ b/target-unicore32/cpu.h
@@ -1,15 +1,15 @@
/*
* UniCore32 virtual CPU header
*
- * Copyright (C) 2010-2011 GUAN Xue-tao
+ * Copyright (C) 2010-2012 Guan Xuetao
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation, or (at your option) any
* later version. See the COPYING file in the top-level directory.
*/
-#ifndef __CPU_UC32_H__
-#define __CPU_UC32_H__
+#ifndef QEMU_UNICORE32_CPU_H
+#define QEMU_UNICORE32_CPU_H
#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 12
@@ -89,8 +89,10 @@ typedef struct CPUUniCore32State {
#define ASR_NZCV (ASR_N | ASR_Z | ASR_C | ASR_V)
#define ASR_RESERVED (~(ASR_M | ASR_I | ASR_NZCV))
-#define UC32_EXCP_PRIV (ASR_MODE_PRIV)
-#define UC32_EXCP_TRAP (ASR_MODE_TRAP)
+#define UC32_EXCP_PRIV (1)
+#define UC32_EXCP_ITRAP (2)
+#define UC32_EXCP_DTRAP (3)
+#define UC32_EXCP_INTR (4)
/* Return the current ASR value. */
target_ulong cpu_asr_read(CPUUniCore32State *env1);
@@ -189,4 +191,4 @@ static inline bool cpu_has_work(CPUUniCore32State *env)
(CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
}
-#endif /* __CPU_UC32_H__ */
+#endif /* QEMU_UNICORE32_CPU_H */
--
1.7.0.4
- [Qemu-devel] [PATCHv4 00/14] unicore32: Add unicore32-softmmu support, Guan Xuetao, 2012/07/13
- [Qemu-devel] [PATCHv4 04/14] target-unicore32: Drop UC32_CPUID macros, Guan Xuetao, 2012/07/13
- [Qemu-devel] [PATCHv4 01/14] unicore32-softmmu: Add unicore32-softmmu build support, Guan Xuetao, 2012/07/13
- [Qemu-devel] [PATCHv4 03/14] unicore32-softmmu: Make UniCore32 cpuid & exceptions correct and runable,
Guan Xuetao <=
- [Qemu-devel] [PATCHv4 02/14] unicore32-softmmu: Add coprocessor 0(sysctrl) and 1(ocd) instruction support, Guan Xuetao, 2012/07/13
- [Qemu-devel] [PATCHv4 11/14] unicore32-softmmu: Add puv3 pm support, Guan Xuetao, 2012/07/13
- [Qemu-devel] [PATCHv4 07/14] unicore32-softmmu: Add puv3 soc/board support, Guan Xuetao, 2012/07/13
- [Qemu-devel] [PATCHv4 14/14] unicore32-softmmu: Add maintainer information for UniCore32 machine, Guan Xuetao, 2012/07/13
- [Qemu-devel] [PATCHv4 05/14] unicore32-softmmu: Implement softmmu specific functions, Guan Xuetao, 2012/07/13
- [Qemu-devel] [PATCHv4 13/14] unicore32-softmmu: Add ps2 support, Guan Xuetao, 2012/07/13
- [Qemu-devel] [PATCHv4 09/14] unicore32-softmmu: Add puv3 ostimer support, Guan Xuetao, 2012/07/13
- [Qemu-devel] [PATCHv4 10/14] unicore32-softmmu: Add puv3 gpio support, Guan Xuetao, 2012/07/13