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[Qemu-devel] [PATCH for-1.2 v6 10/14] spapr_pci: QOM'ify sPAPR PCI host
From: |
Andreas Färber |
Subject: |
[Qemu-devel] [PATCH for-1.2 v6 10/14] spapr_pci: QOM'ify sPAPR PCI host bridge |
Date: |
Mon, 13 Aug 2012 18:11:31 +0200 |
Introduce type constant. Introduce cast macro to drop bogus busdev field
that would've broken SYS_BUS_DEVICE(). Avoid accessing parent fields
directly.
Free the identifier phb as acronym for PCI_HOST_BRIDGE.
Signed-off-by: Andreas Färber <address@hidden>
---
hw/spapr_pci.c | 75 +++++++++++++++++++++++++++++--------------------------
hw/spapr_pci.h | 6 +++-
2 files changed, 45 insertions(+), 36 deletions(-)
diff --git a/hw/spapr_pci.c b/hw/spapr_pci.c
index b901d34..f036240 100644
--- a/hw/spapr_pci.c
+++ b/hw/spapr_pci.c
@@ -36,16 +36,19 @@ static PCIDevice *find_dev(sPAPREnvironment *spapr,
uint64_t buid, uint32_t config_addr)
{
int devfn = (config_addr >> 8) & 0xFF;
- sPAPRPHBState *phb;
+ sPAPRPHBState *sphb;
- QLIST_FOREACH(phb, &spapr->phbs, list) {
+ QLIST_FOREACH(sphb, &spapr->phbs, list) {
+ PCIHostState *phb = &sphb->host_state;
+ BusState *bus;
BusChild *kid;
- if (phb->buid != buid) {
+ if (sphb->buid != buid) {
continue;
}
- QTAILQ_FOREACH(kid, &phb->host_state.bus->qbus.children, sibling) {
+ bus = BUS(phb->bus);
+ QTAILQ_FOREACH(kid, &bus->children, sibling) {
PCIDevice *dev = (PCIDevice *)kid->child;
if (dev->devfn == devfn) {
return dev;
@@ -276,24 +279,25 @@ static DMAContext *spapr_pci_dma_context_fn(PCIBus *bus,
void *opaque,
static int spapr_phb_init(SysBusDevice *s)
{
- sPAPRPHBState *phb = FROM_SYSBUS(sPAPRPHBState, s);
+ sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(s);
+ PCIHostState *phb = FROM_SYSBUS(PCIHostState, s);
char *namebuf;
int i;
PCIBus *bus;
uint32_t liobn;
- phb->dtbusname = g_strdup_printf("address@hidden" PRIx64, phb->buid);
- namebuf = alloca(strlen(phb->dtbusname) + 32);
+ sphb->dtbusname = g_strdup_printf("address@hidden" PRIx64, sphb->buid);
+ namebuf = alloca(strlen(sphb->dtbusname) + 32);
/* Initialize memory regions */
- sprintf(namebuf, "%s.mmio", phb->dtbusname);
- memory_region_init(&phb->memspace, namebuf, INT64_MAX);
+ sprintf(namebuf, "%s.mmio", sphb->dtbusname);
+ memory_region_init(&sphb->memspace, namebuf, INT64_MAX);
- sprintf(namebuf, "%s.mmio-alias", phb->dtbusname);
- memory_region_init_alias(&phb->memwindow, namebuf, &phb->memspace,
- SPAPR_PCI_MEM_WIN_BUS_OFFSET, phb->mem_win_size);
- memory_region_add_subregion(get_system_memory(), phb->mem_win_addr,
- &phb->memwindow);
+ sprintf(namebuf, "%s.mmio-alias", sphb->dtbusname);
+ memory_region_init_alias(&sphb->memwindow, namebuf, &sphb->memspace,
+ SPAPR_PCI_MEM_WIN_BUS_OFFSET, sphb->mem_win_size);
+ memory_region_add_subregion(get_system_memory(), sphb->mem_win_addr,
+ &sphb->memwindow);
/* On ppc, we only have MMIO no specific IO space from the CPU
* perspective. In theory we ought to be able to embed the PCI IO
@@ -303,29 +307,29 @@ static int spapr_phb_init(SysBusDevice *s)
* system io address space. This hack to bounce things via
* system_io works around the problem until all the users of
* old_portion are updated */
- sprintf(namebuf, "%s.io", phb->dtbusname);
- memory_region_init(&phb->iospace, namebuf, SPAPR_PCI_IO_WIN_SIZE);
+ sprintf(namebuf, "%s.io", sphb->dtbusname);
+ memory_region_init(&sphb->iospace, namebuf, SPAPR_PCI_IO_WIN_SIZE);
/* FIXME: fix to support multiple PHBs */
- memory_region_add_subregion(get_system_io(), 0, &phb->iospace);
+ memory_region_add_subregion(get_system_io(), 0, &sphb->iospace);
- sprintf(namebuf, "%s.io-alias", phb->dtbusname);
- memory_region_init_io(&phb->iowindow, &spapr_io_ops, phb,
+ sprintf(namebuf, "%s.io-alias", sphb->dtbusname);
+ memory_region_init_io(&sphb->iowindow, &spapr_io_ops, sphb,
namebuf, SPAPR_PCI_IO_WIN_SIZE);
- memory_region_add_subregion(get_system_memory(), phb->io_win_addr,
- &phb->iowindow);
+ memory_region_add_subregion(get_system_memory(), sphb->io_win_addr,
+ &sphb->iowindow);
- bus = pci_register_bus(&phb->busdev.qdev,
- phb->busname ? phb->busname : phb->dtbusname,
- pci_spapr_set_irq, pci_spapr_map_irq, phb,
- &phb->memspace, &phb->iospace,
+ bus = pci_register_bus(DEVICE(s),
+ sphb->busname ? sphb->busname : sphb->dtbusname,
+ pci_spapr_set_irq, pci_spapr_map_irq, sphb,
+ &sphb->memspace, &sphb->iospace,
PCI_DEVFN(0, 0), PCI_NUM_PINS);
- phb->host_state.bus = bus;
+ phb->bus = bus;
liobn = SPAPR_PCI_BASE_LIOBN | (pci_find_domain(bus) << 16);
- phb->dma = spapr_tce_new_dma_context(liobn, 0x40000000);
- pci_setup_iommu(bus, spapr_pci_dma_context_fn, phb);
+ sphb->dma = spapr_tce_new_dma_context(liobn, 0x40000000);
+ pci_setup_iommu(bus, spapr_pci_dma_context_fn, sphb);
- QLIST_INSERT_HEAD(&spapr->phbs, phb, list);
+ QLIST_INSERT_HEAD(&spapr->phbs, sphb, list);
/* Initialize the LSI table */
for (i = 0; i < PCI_NUM_PINS; i++) {
@@ -337,8 +341,8 @@ static int spapr_phb_init(SysBusDevice *s)
return -1;
}
- phb->lsi_table[i].dt_irq = num;
- phb->lsi_table[i].qirq = qirq;
+ sphb->lsi_table[i].dt_irq = num;
+ sphb->lsi_table[i].qirq = qirq;
}
return 0;
@@ -369,7 +373,7 @@ static void spapr_phb_class_init(ObjectClass *klass, void
*data)
}
static const TypeInfo spapr_phb_info = {
- .name = "spapr-pci-host-bridge",
+ .name = TYPE_SPAPR_PCI_HOST_BRIDGE,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(sPAPRPHBState),
.class_init = spapr_phb_class_init,
@@ -382,7 +386,7 @@ void spapr_create_phb(sPAPREnvironment *spapr,
{
DeviceState *dev;
- dev = qdev_create(NULL, spapr_phb_info.name);
+ dev = qdev_create(NULL, TYPE_SPAPR_PCI_HOST_BRIDGE);
if (busname) {
qdev_prop_set_string(dev, "busname", g_strdup(busname));
@@ -490,8 +494,9 @@ int spapr_populate_pci_devices(sPAPRPHBState *phb,
return 0;
}
-static void register_types(void)
+static void spapr_pci_register_types(void)
{
type_register_static(&spapr_phb_info);
}
-type_init(register_types)
+
+type_init(spapr_pci_register_types)
diff --git a/hw/spapr_pci.h b/hw/spapr_pci.h
index d9e46e2..06e2742 100644
--- a/hw/spapr_pci.h
+++ b/hw/spapr_pci.h
@@ -27,8 +27,12 @@
#include "hw/pci_host.h"
#include "hw/xics.h"
+#define TYPE_SPAPR_PCI_HOST_BRIDGE "spapr-pci-host-bridge"
+
+#define SPAPR_PCI_HOST_BRIDGE(obj) \
+ OBJECT_CHECK(sPAPRPHBState, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE)
+
typedef struct sPAPRPHBState {
- SysBusDevice busdev;
PCIHostState host_state;
uint64_t buid;
--
1.7.7
- [Qemu-devel] [PATCH for-1.2 v6 00/14] pci_host: Convert to QOM, Andreas Färber, 2012/08/13
- [Qemu-devel] [PATCH for-1.2 v6 02/14] alpha_typhoon: QOM'ify Typhoon PCI host bridge, Andreas Färber, 2012/08/13
- [Qemu-devel] [PATCH for-1.2 v6 04/14] dec_pci: QOM'ify DEC 21154 PCI-PCI bridge, Andreas Färber, 2012/08/13
- [Qemu-devel] [PATCH for-1.2 v6 03/14] bonito: QOM'ify Bonito PCI host bridge, Andreas Färber, 2012/08/13
- [Qemu-devel] [PATCH for-1.2 v6 01/14] pci: Make host bridge TypeInfos const, Andreas Färber, 2012/08/13
- [Qemu-devel] [PATCH for-1.2 v6 05/14] grackle_pci: QOM'ify Grackle PCI host bridge, Andreas Färber, 2012/08/13
- [Qemu-devel] [PATCH for-1.2 v6 09/14] prep_pci: QOM'ify Raven PCI host bridge, Andreas Färber, 2012/08/13
- [Qemu-devel] [PATCH for-1.2 v6 06/14] gt64xxx: QOM'ify GT64120 PCI host bridge, Andreas Färber, 2012/08/13
- [Qemu-devel] [PATCH for-1.2 v6 08/14] ppce500_pci: QOM'ify e500 PCI host bridge, Andreas Färber, 2012/08/13
- [Qemu-devel] [PATCH for-1.2 v6 10/14] spapr_pci: QOM'ify sPAPR PCI host bridge,
Andreas Färber <=
- [Qemu-devel] [PATCH for-1.2 v6 07/14] ppc4xx_pci: QOM'ify ppc4xx PCI host bridge, Andreas Färber, 2012/08/13
- [Qemu-devel] [PATCH for-1.2 v6 11/14] unin_pci: QOM'ify UniNorth PCI host bridges, Andreas Färber, 2012/08/13
- [Qemu-devel] [PATCH for-1.2 v6 12/14] pci_host: Turn into SysBus-derived QOM type, Andreas Färber, 2012/08/13
- [Qemu-devel] [PATCH for-1.2 v6 14/14] pci: Tidy up PCI host bridges, Andreas Färber, 2012/08/13
- [Qemu-devel] [PATCH for-1.2 v6 13/14] pci: Derive PCI host bridges from TYPE_PCI_HOST_BRIDGE, Andreas Färber, 2012/08/13