[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v6 10/13] petalogix-ml605: added SPI controller with
From: |
Peter A. G. Crosthwaite |
Subject: |
[Qemu-devel] [PATCH v6 10/13] petalogix-ml605: added SPI controller with n25q128 |
Date: |
Tue, 18 Sep 2012 12:11:07 +1000 |
Added SPI controller to the reference design, with two n25q128 spi-flashes
connected.
Signed-off-by: Peter A. G. Crosthwaite <address@hidden>
---
Changed since v5:
Removed redundant (char*) cast with qdev_get_prop_string
hw/petalogix_ml605_mmu.c | 27 +++++++++++++++++++++++++++
1 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c
index dced648..78ebdb9 100644
--- a/hw/petalogix_ml605_mmu.c
+++ b/hw/petalogix_ml605_mmu.c
@@ -36,6 +36,7 @@
#include "blockdev.h"
#include "pc.h"
#include "exec-memory.h"
+#include "ssi.h"
#include "microblaze_boot.h"
#include "microblaze_pic_cpu.h"
@@ -47,6 +48,8 @@
#define BINARY_DEVICE_TREE_FILE "petalogix-ml605.dtb"
+#define NUM_SPI_FLASHES 2
+
#define MEMORY_BASEADDR 0x50000000
#define FLASH_BASEADDR 0x86000000
#define INTC_BASEADDR 0x81800000
@@ -79,6 +82,7 @@ petalogix_ml605_init(ram_addr_t ram_size,
MemoryRegion *address_space_mem = get_system_memory();
DeviceState *dev, *dma, *eth0;
MicroBlazeCPU *cpu;
+ SysBusDevice *busdev;
CPUMBState *env;
DriveInfo *dinfo;
int i;
@@ -139,6 +143,29 @@ petalogix_ml605_init(ram_addr_t ram_size,
xilinx_axiethernetdma_init(dma, STREAM_SLAVE(eth0),
0x84600000, irq[1], irq[0], 100 * 1000000);
+ {
+ SSIBus *spi;
+
+ dev = qdev_create(NULL, "xilinx,spi");
+ qdev_prop_set_uint8(dev, "num-cs", NUM_SPI_FLASHES);
+ qdev_init_nofail(dev);
+ busdev = sysbus_from_qdev(dev);
+ sysbus_mmio_map(busdev, 0, 0x40a00000);
+ sysbus_connect_irq(busdev, 0, irq[4]);
+
+ spi = (SSIBus *)qdev_get_child_bus(dev, "spi");
+
+ for (i = 0; i < NUM_SPI_FLASHES; i++) {
+ qemu_irq cs_line;
+
+ dev = ssi_create_slave_no_init(spi, "m25p80");
+ qdev_prop_set_string(dev, "partname", "n25q128");
+ qdev_init_nofail(dev);
+ cs_line = qdev_get_gpio_in(dev, 0);
+ sysbus_connect_irq(busdev, i+1, cs_line);
+ }
+ }
+
microblaze_load_kernel(cpu, ddr_base, ram_size, BINARY_DEVICE_TREE_FILE,
machine_cpu_reset);
--
1.7.0.4
- [Qemu-devel] [PATCH v6 02/13] ssi: Implemented CS behaviour, (continued)
- [Qemu-devel] [PATCH v6 02/13] ssi: Implemented CS behaviour, Peter A. G. Crosthwaite, 2012/09/17
- [Qemu-devel] [PATCH v6 03/13] ssi: Added create_slave_no_init(), Peter A. G. Crosthwaite, 2012/09/17
- [Qemu-devel] [PATCH v6 04/13] qdev: allow multiple qdev_init_gpio_in() calls, Peter A. G. Crosthwaite, 2012/09/17
- [Qemu-devel] [PATCH v6 05/13] hw/stellaris: Removed gpio_out init array., Peter A. G. Crosthwaite, 2012/09/17
- [Qemu-devel] [PATCH v6 06/13] stellaris: Removed SSI mux, Peter A. G. Crosthwaite, 2012/09/17
- [Qemu-devel] [PATCH v6 07/13] hw: Added generic FIFO API., Peter A. G. Crosthwaite, 2012/09/17
- [Qemu-devel] [PATCH v6 08/13] m25p80: Initial implementation of SPI flash device, Peter A. G. Crosthwaite, 2012/09/17
- [Qemu-devel] [PATCH v6 09/13] xilinx_spi: Initial impl. of Xilinx SPI controller, Peter A. G. Crosthwaite, 2012/09/17
- [Qemu-devel] [PATCH v6 10/13] petalogix-ml605: added SPI controller with n25q128,
Peter A. G. Crosthwaite <=
- [Qemu-devel] [PATCH v6 11/13] xilinx_spips: Xilinx Zynq SPI cntrlr device model, Peter A. G. Crosthwaite, 2012/09/17
- [Qemu-devel] [PATCH v6 12/13] xilinx_zynq: Added SPI controllers + flashes, Peter A. G. Crosthwaite, 2012/09/17
- [Qemu-devel] [PATCH v6 13/13] MAINTAINERS: Added maintainerships for SSI, Peter A. G. Crosthwaite, 2012/09/17