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[Qemu-devel] [PATCH 146/147] target-s390: Optimize get_address
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 146/147] target-s390: Optimize get_address |
Date: |
Thu, 27 Sep 2012 18:23:40 -0700 |
Don't load the displacement into a register first, add it second
so that tcg_gen_addi_i64 can eliminate zeros. Don't mask the
displacement first so that we don't turn small negative numbers
into large positive numbers.
Signed-off-by: Richard Henderson <address@hidden>
---
target-s390x/translate.c | 44 ++++++++++++++++++--------------------------
1 file changed, 18 insertions(+), 26 deletions(-)
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index e1888a3..3506493 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -331,37 +331,29 @@ static inline void check_privileged(DisasContext *s)
static TCGv_i64 get_address(DisasContext *s, int x2, int b2, int d2)
{
- TCGv_i64 tmp;
+ TCGv_i64 tmp = tcg_temp_new_i64();
+ bool need_31 = !(s->tb->flags & FLAG_MASK_64);
- /* 31-bitify the immediate part; register contents are dealt with below */
- if (!(s->tb->flags & FLAG_MASK_64)) {
- d2 &= 0x7fffffffUL;
- }
+ /* Note that d2 is limited to 20 bits, signed. If we crop negative
+ displacements early we create larger immedate addends. */
- if (x2) {
- if (d2) {
- tmp = tcg_const_i64(d2);
- tcg_gen_add_i64(tmp, tmp, regs[x2]);
- } else {
- tmp = load_reg(x2);
- }
- if (b2) {
- tcg_gen_add_i64(tmp, tmp, regs[b2]);
- }
+ /* Note that addi optimizes the imm==0 case. */
+ if (b2 && x2) {
+ tcg_gen_add_i64(tmp, regs[b2], regs[x2]);
+ tcg_gen_addi_i64(tmp, tmp, d2);
} else if (b2) {
- if (d2) {
- tmp = tcg_const_i64(d2);
- tcg_gen_add_i64(tmp, tmp, regs[b2]);
- } else {
- tmp = load_reg(b2);
- }
+ tcg_gen_addi_i64(tmp, regs[b2], d2);
+ } else if (x2) {
+ tcg_gen_addi_i64(tmp, regs[x2], d2);
} else {
- tmp = tcg_const_i64(d2);
+ if (need_31) {
+ d2 &= 0x7fffffff;
+ need_31 = false;
+ }
+ tcg_gen_movi_i64(tmp, d2);
}
-
- /* 31-bit mode mask if there are values loaded from registers */
- if (!(s->tb->flags & FLAG_MASK_64) && (x2 || b2)) {
- tcg_gen_andi_i64(tmp, tmp, 0x7fffffffUL);
+ if (need_31) {
+ tcg_gen_andi_i64(tmp, tmp, 0x7fffffff);
}
return tmp;
--
1.7.11.4
- [Qemu-devel] [PATCH 136/147] softfloat: Implement uint64_to_float128, (continued)
- [Qemu-devel] [PATCH 136/147] softfloat: Implement uint64_to_float128, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 137/147] target-s390: Use uint64_to_float128, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 138/147] target-s390: Implement SET ROUNDING MODE, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 139/147] target-s390: Implement LOAD/SET FP AND SIGNAL, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 140/147] target-s390: Fix cpu_clone_regs, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 141/147] target-s390: Optimize XC, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 142/147] target-s390: Optmize emitting discards, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 143/147] target-s390: Tidy comparisons, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 144/147] target-s390: Optimize ADDU/SUBU CC testing, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 145/147] target-s390: Optimize ADDC/SUBB, Richard Henderson, 2012/09/27
- [Qemu-devel] [PATCH 146/147] target-s390: Optimize get_address,
Richard Henderson <=
- [Qemu-devel] [PATCH 147/147] target-s390: Perform COMPARE AND SWAP inline, Richard Henderson, 2012/09/27