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[Qemu-devel] [PATCH 18/23] target-i386: replace uint32_t vendor fields b
From: |
Igor Mammedov |
Subject: |
[Qemu-devel] [PATCH 18/23] target-i386: replace uint32_t vendor fields by vendor string in x86_def_t |
Date: |
Tue, 2 Oct 2012 17:37:10 +0200 |
Vendor property setter takes string as vendor value but cpudefs
use uint32_t vendor[123] fields to define vendor value. It makes it
difficult to unify and use property setter for values from cpudefs.
Simplify code by using vendor property setter, vendor[123] fields
are converted into vendor[13] array to keep its value. And vendor
property setter is used to access/set value on CPU.
Signed-off-by: Igor Mammedov <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
---
[ehabkost: rebase on top of my unduplicate-features branch]
[ehabkost: fix the new CPU models to use the string .vendor field, too,
on the CPU model array]
[ehabkost: keep CPUID_VENDOR_AMD_[123] #defines, as they are used
in the AMD CPU feature alias handling]
---
target-i386/cpu.c | 92 ++++++++++++++---------------------------------------
target-i386/cpu.h | 6 ++--
2 files changed, 27 insertions(+), 71 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 0e9a2f1..cae5aed 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -244,7 +244,7 @@ typedef struct x86_def_t {
struct x86_def_t *next;
const char *name;
uint32_t level;
- uint32_t vendor1, vendor2, vendor3;
+ char vendor[CPUID_VENDOR_SZ + 1];
int family;
int model;
int stepping;
@@ -309,9 +309,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = "qemu64",
.level = 4,
- .vendor1 = CPUID_VENDOR_AMD_1,
- .vendor2 = CPUID_VENDOR_AMD_2,
- .vendor3 = CPUID_VENDOR_AMD_3,
+ .vendor = CPUID_VENDOR_AMD,
.family = 6,
.model = 2,
.stepping = 3,
@@ -328,9 +326,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = "phenom",
.level = 5,
- .vendor1 = CPUID_VENDOR_AMD_1,
- .vendor2 = CPUID_VENDOR_AMD_2,
- .vendor3 = CPUID_VENDOR_AMD_3,
+ .vendor = CPUID_VENDOR_AMD,
.family = 16,
.model = 2,
.stepping = 3,
@@ -374,9 +370,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = "kvm64",
.level = 5,
- .vendor1 = CPUID_VENDOR_INTEL_1,
- .vendor2 = CPUID_VENDOR_INTEL_2,
- .vendor3 = CPUID_VENDOR_INTEL_3,
+ .vendor = CPUID_VENDOR_INTEL,
.family = 15,
.model = 6,
.stepping = 1,
@@ -475,9 +469,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = "athlon",
.level = 2,
- .vendor1 = CPUID_VENDOR_AMD_1,
- .vendor2 = CPUID_VENDOR_AMD_2,
- .vendor3 = CPUID_VENDOR_AMD_3,
+ .vendor = CPUID_VENDOR_AMD,
.family = 6,
.model = 2,
.stepping = 3,
@@ -509,9 +501,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = "Conroe",
.level = 2,
- .vendor1 = CPUID_VENDOR_INTEL_1,
- .vendor2 = CPUID_VENDOR_INTEL_2,
- .vendor3 = CPUID_VENDOR_INTEL_3,
+ .vendor = CPUID_VENDOR_INTEL,
.family = 6,
.model = 2,
.stepping = 3,
@@ -529,9 +519,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = "Penryn",
.level = 2,
- .vendor1 = CPUID_VENDOR_INTEL_1,
- .vendor2 = CPUID_VENDOR_INTEL_2,
- .vendor3 = CPUID_VENDOR_INTEL_3,
+ .vendor = CPUID_VENDOR_INTEL,
.family = 6,
.model = 2,
.stepping = 3,
@@ -550,9 +538,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = "Nehalem",
.level = 2,
- .vendor1 = CPUID_VENDOR_INTEL_1,
- .vendor2 = CPUID_VENDOR_INTEL_2,
- .vendor3 = CPUID_VENDOR_INTEL_3,
+ .vendor = CPUID_VENDOR_INTEL,
.family = 6,
.model = 2,
.stepping = 3,
@@ -571,9 +557,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = "Westmere",
.level = 11,
- .vendor1 = CPUID_VENDOR_INTEL_1,
- .vendor2 = CPUID_VENDOR_INTEL_2,
- .vendor3 = CPUID_VENDOR_INTEL_3,
+ .vendor = CPUID_VENDOR_INTEL,
.family = 6,
.model = 44,
.stepping = 1,
@@ -593,9 +577,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = "SandyBridge",
.level = 0xd,
- .vendor1 = CPUID_VENDOR_INTEL_1,
- .vendor2 = CPUID_VENDOR_INTEL_2,
- .vendor3 = CPUID_VENDOR_INTEL_3,
+ .vendor = CPUID_VENDOR_INTEL,
.family = 6,
.model = 42,
.stepping = 1,
@@ -618,9 +600,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = "Opteron_G1",
.level = 5,
- .vendor1 = CPUID_VENDOR_AMD_1,
- .vendor2 = CPUID_VENDOR_AMD_2,
- .vendor3 = CPUID_VENDOR_AMD_3,
+ .vendor = CPUID_VENDOR_AMD,
.family = 15,
.model = 6,
.stepping = 1,
@@ -642,9 +622,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = "Opteron_G2",
.level = 5,
- .vendor1 = CPUID_VENDOR_AMD_1,
- .vendor2 = CPUID_VENDOR_AMD_2,
- .vendor3 = CPUID_VENDOR_AMD_3,
+ .vendor = CPUID_VENDOR_AMD,
.family = 15,
.model = 6,
.stepping = 1,
@@ -668,9 +646,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = "Opteron_G3",
.level = 5,
- .vendor1 = CPUID_VENDOR_AMD_1,
- .vendor2 = CPUID_VENDOR_AMD_2,
- .vendor3 = CPUID_VENDOR_AMD_3,
+ .vendor = CPUID_VENDOR_AMD,
.family = 15,
.model = 6,
.stepping = 1,
@@ -696,9 +672,7 @@ static x86_def_t builtin_x86_defs[] = {
{
.name = "Opteron_G4",
.level = 0xd,
- .vendor1 = CPUID_VENDOR_AMD_1,
- .vendor2 = CPUID_VENDOR_AMD_2,
- .vendor3 = CPUID_VENDOR_AMD_3,
+ .vendor = CPUID_VENDOR_AMD,
.family = 21,
.model = 1,
.stepping = 2,
@@ -745,13 +719,16 @@ static int cpu_x86_fill_model_id(char *str)
static int cpu_x86_fill_host(x86_def_t *x86_cpu_def)
{
uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
+ int i;
x86_cpu_def->name = "host";
host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
x86_cpu_def->level = eax;
- x86_cpu_def->vendor1 = ebx;
- x86_cpu_def->vendor2 = edx;
- x86_cpu_def->vendor3 = ecx;
+ for (i = 0; i < 4; i++) {
+ x86_cpu_def->vendor[i] = ebx >> (8 * i);
+ x86_cpu_def->vendor[i + 4] = edx >> (8 * i);
+ x86_cpu_def->vendor[i + 8] = ecx >> (8 * i);
+ }
host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF);
@@ -776,9 +753,7 @@ static int cpu_x86_fill_host(x86_def_t *x86_cpu_def)
x86_cpu_def->vendor_override = 0;
/* Call Centaur's CPUID instruction. */
- if (x86_cpu_def->vendor1 == CPUID_VENDOR_VIA_1 &&
- x86_cpu_def->vendor2 == CPUID_VENDOR_VIA_2 &&
- x86_cpu_def->vendor3 == CPUID_VENDOR_VIA_3) {
+ if (!strcmp(x86_cpu_def->vendor, CPUID_VENDOR_VIA)) {
host_cpuid(0xC0000000, 0, &eax, &ebx, &ecx, &edx);
if (eax >= 0xC0000001) {
/* Support VIA max extended level */
@@ -1343,15 +1318,8 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t
*def, Error **errp)
{
CPUX86State *env = &cpu->env;
- if (def->vendor1) {
- env->cpuid_vendor1 = def->vendor1;
- env->cpuid_vendor2 = def->vendor2;
- env->cpuid_vendor3 = def->vendor3;
- } else {
- env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1;
- env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
- env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
- }
+ object_property_set_str(OBJECT(cpu), def->vendor[0] ?
+ def->vendor : CPUID_VENDOR_INTEL, "vendor", errp);
object_property_set_bool(OBJECT(cpu), true, "vendor-override", errp);
object_property_set_int(OBJECT(cpu), def->level, "level", errp);
object_property_set_int(OBJECT(cpu), def->family, "family", errp);
@@ -1385,7 +1353,6 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def,
Error **errp)
static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t *x86_cpu_def,
const char *cpu_model, Error **errp)
{
- unsigned int i;
x86_def_t *def;
char *s = g_strdup(cpu_model);
@@ -1486,18 +1453,7 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t
*x86_cpu_def,
}
x86_cpu_def->xlevel = numvalue;
} else if (!strcmp(featurestr, "vendor")) {
- if (strlen(val) != 12) {
- fprintf(stderr, "vendor string must be 12 chars long\n");
- goto error;
- }
- x86_cpu_def->vendor1 = 0;
- x86_cpu_def->vendor2 = 0;
- x86_cpu_def->vendor3 = 0;
- for(i = 0; i < 4; i++) {
- x86_cpu_def->vendor1 |= ((uint8_t)val[i ]) << (8 * i);
- x86_cpu_def->vendor2 |= ((uint8_t)val[i + 4]) << (8 * i);
- x86_cpu_def->vendor3 |= ((uint8_t)val[i + 8]) << (8 * i);
- }
+ pstrcpy(x86_cpu_def->vendor, sizeof(x86_cpu_def->vendor), val);
x86_cpu_def->vendor_override = 1;
} else if (!strcmp(featurestr, "model_id")) {
pstrcpy(x86_cpu_def->model_id, sizeof(x86_cpu_def->model_id),
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index c8a5270..7808141 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -493,14 +493,14 @@
#define CPUID_VENDOR_INTEL_1 0x756e6547 /* "Genu" */
#define CPUID_VENDOR_INTEL_2 0x49656e69 /* "ineI" */
#define CPUID_VENDOR_INTEL_3 0x6c65746e /* "ntel" */
+#define CPUID_VENDOR_INTEL "GenuineIntel"
#define CPUID_VENDOR_AMD_1 0x68747541 /* "Auth" */
#define CPUID_VENDOR_AMD_2 0x69746e65 /* "enti" */
#define CPUID_VENDOR_AMD_3 0x444d4163 /* "cAMD" */
+#define CPUID_VENDOR_AMD "AuthenticAMD"
-#define CPUID_VENDOR_VIA_1 0x746e6543 /* "Cent" */
-#define CPUID_VENDOR_VIA_2 0x48727561 /* "aurH" */
-#define CPUID_VENDOR_VIA_3 0x736c7561 /* "auls" */
+#define CPUID_VENDOR_VIA "CentaurHauls"
#define CPUID_MWAIT_IBE (1 << 1) /* Interrupts can exit capability */
#define CPUID_MWAIT_EMX (1 << 0) /* enumeration supported */
--
1.7.1
- [Qemu-devel] [PATCH 08/23] target-i386: add stubs for hyperv_(vapic_recommended|relaxed_timing_enabled|get_spinlock_retries)(), (continued)
- [Qemu-devel] [PATCH 08/23] target-i386: add stubs for hyperv_(vapic_recommended|relaxed_timing_enabled|get_spinlock_retries)(), Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 10/23] target-i386: convert 'hv_relaxed' feature into property, Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 09/23] target-i386: convert 'hv_spinlocks' feature into property, Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 04/23] target-i386: filter out not TCG features if running without kvm at realize time, Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 11/23] target-i386: convert 'hv_vapic' feature into property, Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 16/23] target-i386: use define for cpuid vendor string size, Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 06/23] target-i386: xlevel should be more than 0x80000000, move fixup into setter, Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 05/23] target-i386: move out CPU features initialization in separate func, Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 22/23] target-i386: move default init of cpuid_kvm_features bitmap into CPU initializer from cpudef, Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 15/23] target-i386: introduce vendor-override property, Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 18/23] target-i386: replace uint32_t vendor fields by vendor string in x86_def_t,
Igor Mammedov <=
- [Qemu-devel] [PATCH 13/23] add visitor for parsing hz[KMG] input string, Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 21/23] target-i386: move init of "hypervisor" feature into CPU initializer from cpudef, Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 14/23] target-i386: use visit_type_hz to parse tsc_freq property value, Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 19/23] target-i386: parse cpu_model string into set of stringified properties, Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 20/23] target-i386: use properties to set/unset user specified features on CPU, Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 12/23] target-i386: convert 'check' and 'enforce' features into properties, Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 23/23] target-i386: cleanup cpu_x86_find_by_name(), only fill x86_def_t in it, Igor Mammedov, 2012/10/02
- [Qemu-devel] [PATCH 17/23] target-i386: postpone cpuid_level update to realize time, Igor Mammedov, 2012/10/02