[Qemu-devel] [PATCH v1 0/7] QOMify pflash_cfi0x + PL353 for Xilinx Zynq

[Peter Crosthwaite]

This series adds the PL353 to Xilinx Zynq with both NAND and pflashes attached. 
Had to QOMify the pflash_cfi0x devices to get them working with PL35x in the 
least hackish way. Regression tested pflash_cfi_01 using petalogix-ml605 and 
pflash_cfi_02 tested using zynq. Further testing by clients of the pflash would 
be appreciated.

The pl35x is setup as a generalisation of all the pl35x family (i.e. it 
implements all of PL351-pl354). Once we get to actually implementing some of 
the register ops of this SRAM interface we could add this to vexpress for its 
PL354. The PL35x is incomplete (see the FIXME:s) at the moment but im pushing 
for this now as the more conterversial QOM-entangled aspects of this device 
model are encapsulated by this series. The device does also fully work for 
Linux.

Edgar E. Iglesias (1):
  nand: Reset addressing after READSTATUS.

Peter Crosthwaite (6):
  pflash_cfi0x: remove unused base field
  pflash_cfi01: remove unused total_len field
  pflash_cfi0x: QOMified
  sysbus/sysbus_mmio_map: parameterise mapped region
  hw: Model of Primecell pl35x mem controller
  xilinx_zynq: add pl353

 default-configs/arm-softmmu.mak |    1 +
 hw/Makefile.objs                |    1 +
 hw/nand.c                       |    6 +
 hw/pflash_cfi01.c               |  146 ++++++++++++++-----
 hw/pflash_cfi02.c               |  156 +++++++++++++++-----
 hw/pl35x.c                      |  299 +++++++++++++++++++++++++++++++++++++++
 hw/sysbus.c                     |   11 +-
 hw/sysbus.h                     |    2 +
 hw/xilinx_zynq.c                |   49 ++++++-
 9 files changed, 582 insertions(+), 89 deletions(-)
 create mode 100644 hw/pl35x.c