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Re: [Qemu-devel] [PATCH V3] target-i386: Enabling IA32_TSC_ADJUST for QE
From: |
Andreas Färber |
Subject: |
Re: [Qemu-devel] [PATCH V3] target-i386: Enabling IA32_TSC_ADJUST for QEMU KVM guest VMs |
Date: |
Tue, 27 Nov 2012 02:51:07 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:16.0) Gecko/20121025 Thunderbird/16.0.2 |
Am 27.11.2012 02:40, schrieb Will Auld:
> CPUID.7.0.EBX[1]=1 indicates IA32_TSC_ADJUST MSR 0x3b is supported
>
> Basic design is to emulate the MSR by allowing reads and writes to the
> hypervisor vcpu specific locations to store the value of the emulated MSRs.
> In this way the IA32_TSC_ADJUST value will be included in all reads to
> the TSC MSR whether through rdmsr or rdtsc.
>
> As this is a new MSR that the guest may access and modify its value needs
> to be migrated along with the other MRSs. The changes here are specifically
> for recognizing when IA32_TSC_ADJUST is enabled in CPUID and code added
> for migrating its value.
>
> Signed-off-by: Will Auld <address@hidden>
Something went wrong here, none of the V2 review comments are addressed.
Maybe you sent the wrong patch file?
Cheers,
Andreas
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