qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH V5] target-i386: Enabling IA32_TSC_ADJUST for QE


From: Marcelo Tosatti
Subject: Re: [Qemu-devel] [PATCH V5] target-i386: Enabling IA32_TSC_ADJUST for QEMU KVM guest VMs
Date: Fri, 30 Nov 2012 18:39:58 -0200
User-agent: Mutt/1.5.21 (2010-09-15)

On Mon, Nov 26, 2012 at 09:32:18PM -0800, Will Auld wrote:
> CPUID.7.0.EBX[1]=1 indicates IA32_TSC_ADJUST MSR 0x3b is supported
> 
> Basic design is to emulate the MSR by allowing reads and writes to the
> hypervisor vcpu specific locations to store the value of the emulated MSRs.
> In this way the IA32_TSC_ADJUST value will be included in all reads to
> the TSC MSR whether through rdmsr or rdtsc.
> 
> As this is a new MSR that the guest may access and modify its value needs
> to be migrated along with the other MRSs. The changes here are specifically
> for recognizing when IA32_TSC_ADJUST is enabled in CPUID and code added
> for migrating its value.
> 
> Signed-off-by: Will Auld <address@hidden>
> ---
> Andreas,
> 
> Thanks, that helped. I used Stefan's auto-run method this time.
> 
> Will
> 
>  target-i386/cpu.h     |  2 ++
>  target-i386/kvm.c     | 14 ++++++++++++++
>  target-i386/machine.c | 21 +++++++++++++++++++++
>  3 files changed, 37 insertions(+)

Applied, thanks.




reply via email to

[Prev in Thread] Current Thread [Next in Thread]