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[Qemu-devel] [PATCH v8 06/10] i8259: fix so that dropping IRQ level alwa
From: |
Matthew Ogilvie |
Subject: |
[Qemu-devel] [PATCH v8 06/10] i8259: fix so that dropping IRQ level always clears the interrupt request |
Date: |
Sun, 16 Dec 2012 16:56:25 -0700 |
Intel's definition of "edge triggered" means: "asserted with a
low-to-high transition at the time an interrupt is registered and
then kept high until the interrupt is served via one of the
EOI mechanisms or goes away unhandled."
So the only difference between edge triggered and level triggered
is in the leading edge, with no difference in the trailing edge.
This bug manifested itself when the guest was Microport UNIX
System V/386 v2.1 (ca. 1987), because it would sometimes mask
off IRQ14 in the slave IMR after it had already been asserted.
The master would still try to deliver an interrupt even though
IRQ2 had dropped again, resulting in a spurious interupt
(IRQ15) and a panicked kernel.
Output from a test program:
-----------
Real hardware [Pentium 4]:
cmdRead unmask IRR=4005 mask IRR=4001 sti unmask irq14 IRR=0001 DONE
[I also see a final IRR=0000 occasionally. Probably just happened to
ask it while the timer (IRQ0) line is low. It masks off most IRQ's, including
timer.]
-----------
Unpatched qemu:
cmdRead unmask IRR=4015 mask IRR=4015 sti irq15 unmask IRR=4015 DONE
[Presumably IRQ4 (0x10 - qemu's serial device model?) had a transient
edge during initialization, but had been masked off even before I
masked it off?]
-----------
Patched qemu:
cmdRead unmask IRR=4005 mask IRR=4001 sti unmask irq14 IRR=0001 DONE
-----------
Signed-off-by: Matthew Ogilvie <address@hidden>
---
There is a risk that some other device models depend on the broken
behavior. See my question about qemu_irq_pulse() in the cover
letter.
hw/i8259.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/i8259.c b/hw/i8259.c
index 60c25ba..95587cd 100644
--- a/hw/i8259.c
+++ b/hw/i8259.c
@@ -157,6 +157,7 @@ static void pic_set_irq(void *opaque, int irq, int level)
}
s->last_irr |= mask;
} else {
+ s->irr &= ~mask;
s->last_irr &= ~mask;
}
}
--
1.7.10.2.484.gcd07cc5
- [Qemu-devel] [PATCH v8 00/10] i8254, i8259 and running Microport UNIX (ca 1987), Matthew Ogilvie, 2012/12/16
- [Qemu-devel] [PATCH v8 01/10] fix some debug printf format strings, Matthew Ogilvie, 2012/12/16
- [Qemu-devel] [PATCH v8 02/10] vl: fix -hdachs/-hda argument order parsing issues, Matthew Ogilvie, 2012/12/16
- [Qemu-devel] [PATCH v8 04/10] vga: add some optional CGA compatibility hacks, Matthew Ogilvie, 2012/12/16
- [Qemu-devel] [PATCH v8 03/10] qemu-options.hx: mention retrace= VGA option, Matthew Ogilvie, 2012/12/16
- [Qemu-devel] [PATCH v8 05/10] fix i8254 output logic to match the spec, Matthew Ogilvie, 2012/12/16
- [Qemu-devel] [PATCH v8 06/10] i8259: fix so that dropping IRQ level always clears the interrupt request,
Matthew Ogilvie <=
- [Qemu-devel] [PATCH v8 07/10] i8259: refactor pic_set_irq level logic, Matthew Ogilvie, 2012/12/16
- [Qemu-devel] [PATCH v8 08/10] qtest: fix qemu_irq_intercept_out(), Matthew Ogilvie, 2012/12/16
- [Qemu-devel] [PATCH v8 09/10] qtest: add set_irq_{in, out} infrastructure for testing interrupt controllers, Matthew Ogilvie, 2012/12/16
- [Qemu-devel] [PATCH v8 10/10] add test/pic-test.c, Matthew Ogilvie, 2012/12/16