From: Petar Jovanovic<address@hidden>
Helper function for dpa_w_ph, dpax_w_ph, dps_w_ph and dpsx_w_ph incorrectly
defines halfword vector elements as unsigned values. This results in wrong
output which is not triggered in the tests as they also follow this logic.
Signed-off-by: Petar Jovanovic<address@hidden>
---
target-mips/dsp_helper.c | 2 +-
tests/tcg/mips/mips32-dspr2/dpa_w_ph.c | 4 ++--
tests/tcg/mips/mips32-dspr2/dpax_w_ph.c | 17 +++++++++++++++++
tests/tcg/mips/mips32-dspr2/dps_w_ph.c | 17 +++++++++++++++++
tests/tcg/mips/mips32-dspr2/dpsx_w_ph.c | 4 ++--
5 files changed, 39 insertions(+), 5 deletions(-)
diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c
index a33e2bf..4870e3d 100644
--- a/target-mips/dsp_helper.c
+++ b/target-mips/dsp_helper.c
@@ -2473,7 +2473,7 @@ DP_OB(dpsu_h_obr, 0, 24, 16, 8, 0, 24, 16, 8, 0);
void helper_##name(uint32_t ac, target_ulong rs, target_ulong rt,
\
CPUMIPSState *env)
\
{
\
- uint16_t rsB, rsA, rtB, rtA;
\
+ int16_t rsB, rsA, rtB, rtA;
\
int32_t tempA, tempB;
\
int64_t acc;
\
\
diff --git a/tests/tcg/mips/mips32-dspr2/dpa_w_ph.c
b/tests/tcg/mips/mips32-dspr2/dpa_w_ph.c
index 1cfbdb0..fae49f1 100644
--- a/tests/tcg/mips/mips32-dspr2/dpa_w_ph.c
+++ b/tests/tcg/mips/mips32-dspr2/dpa_w_ph.c
@@ -26,8 +26,8 @@ int main()
ach = 6, acl = 7;
rs = 0xFFFF00FF;
rt = 0xFFFF0002;
- resulth = 0x05;
- resultl = 0xfffe0206;
+ resulth = 0x06;
+ resultl = 0x206;
__asm
("mthi %0, $ac1\n\t"
"mtlo %1, $ac1\n\t"
diff --git a/tests/tcg/mips/mips32-dspr2/dpax_w_ph.c
b/tests/tcg/mips/mips32-dspr2/dpax_w_ph.c
index f756997..514797c 100644
--- a/tests/tcg/mips/mips32-dspr2/dpax_w_ph.c
+++ b/tests/tcg/mips/mips32-dspr2/dpax_w_ph.c
@@ -23,5 +23,22 @@ int main()
assert(ach == resulth);
assert(acl == resultl);
+ ach = 6, acl = 7;
+ rs = 0xFFFF00FF;
+ rt = 0xFFFF0002;
+ resulth = 0x05;
+ resultl = 0xFFFFFF06;
+ __asm
+ ("mthi %0, $ac1\n\t"
+ "mtlo %1, $ac1\n\t"
+ "dpax.w.ph $ac1, %2, %3\n\t"
+ "mfhi %0, $ac1\n\t"
+ "mflo %1, $ac1\n\t"
+ : "+r"(ach), "+r"(acl)
+ : "r"(rs), "r"(rt)
+ );
+ assert(ach == resulth);
+ assert(acl == resultl);
+
return 0;
}
diff --git a/tests/tcg/mips/mips32-dspr2/dps_w_ph.c
b/tests/tcg/mips/mips32-dspr2/dps_w_ph.c
index 8303643..f51f9b9 100644
--- a/tests/tcg/mips/mips32-dspr2/dps_w_ph.c
+++ b/tests/tcg/mips/mips32-dspr2/dps_w_ph.c
@@ -23,5 +23,22 @@ int main()
assert(ach == resulth);
assert(acl == resultl);
+ ach = 6, acl = 7;
+ rs = 0xFFFF00FF;
+ rt = 0xFFFF0002;
+ resulth = 0x05;
+ resultl = 0xFFFFFE08;
+ __asm
+ ("mthi %0, $ac1\n\t"
+ "mtlo %1, $ac1\n\t"
+ "dps.w.ph $ac1, %2, %3\n\t"
+ "mfhi %0, $ac1\n\t"
+ "mflo %1, $ac1\n\t"
+ : "+r"(ach), "+r"(acl)
+ : "r"(rs), "r"(rt)
+ );
+ assert(ach == resulth);
+ assert(acl == resultl);
+
return 0;
}
diff --git a/tests/tcg/mips/mips32-dspr2/dpsx_w_ph.c
b/tests/tcg/mips/mips32-dspr2/dpsx_w_ph.c
index 6db59a4..bb49a40 100644
--- a/tests/tcg/mips/mips32-dspr2/dpsx_w_ph.c
+++ b/tests/tcg/mips/mips32-dspr2/dpsx_w_ph.c
@@ -9,8 +9,8 @@ int main()
rs = 0xBC0123AD;
rt = 0x01643721;
- resulth = 0x04;
- resultl = 0xD751F050;
+ resulth = 0x05;
+ resultl = 0xE72F050;
__asm
("mthi %0, $ac1\n\t"
"mtlo %1, $ac1\n\t"