[Qemu-devel] [RFC 15/19] target-openrisc: Refactor debug output macros

[Andreas Färber]

Make debug output compile-testable even if disabled.

Signed-off-by: Andreas Färber <address@hidden>
---
 target-openrisc/translate.c |   20 ++++++++++----------
 1 Datei geändert, 10 Zeilen hinzugefügt(+), 10 Zeilen entfernt(-)

diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 1e1b30c..6f592d0 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -31,13 +31,13 @@
 #define GEN_HELPER 1
 #include "helper.h"
 
-#define OPENRISC_DISAS
+#define OPENRISC_DISAS 1
 
-#ifdef OPENRISC_DISAS
-#  define LOG_DIS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__)
-#else
-#  define LOG_DIS(...) do { } while (0)
-#endif
+#define LOG_DIS(...) G_STMT_START \
+    if (OPENRISC_DISAS) { \
+        qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__); \
+    } \
+    G_STMT_END
 
 typedef struct DisasContext {
     TranslationBlock *tb;
@@ -698,7 +698,7 @@ static void dec_misc(DisasContext *dc, uint32_t insn)
 {
     uint32_t op0, op1;
     uint32_t ra, rb, rd;
-#ifdef OPENRISC_DISAS
+#if OPENRISC_DISAS
     uint32_t L6, K5;
 #endif
     uint32_t I16, I5, I11, N26, tmp;
@@ -707,7 +707,7 @@ static void dec_misc(DisasContext *dc, uint32_t insn)
     ra = extract32(insn, 16, 5);
     rb = extract32(insn, 11, 5);
     rd = extract32(insn, 21, 5);
-#ifdef OPENRISC_DISAS
+#if OPENRISC_DISAS
     L6 = extract32(insn, 5, 6);
     K5 = extract32(insn, 0, 5);
 #endif
@@ -1340,11 +1340,11 @@ static void dec_compi(DisasContext *dc, uint32_t insn)
 static void dec_sys(DisasContext *dc, uint32_t insn)
 {
     uint32_t op0;
-#ifdef OPENRISC_DISAS
+#if OPENRISC_DISAS
     uint32_t K16;
 #endif
     op0 = extract32(insn, 16, 8);
-#ifdef OPENRISC_DISAS
+#if OPENRISC_DISAS
     K16 = extract32(insn, 0, 16);
 #endif
 
-- 
1.7.10.4