Re: [Qemu-devel] [ARM] Cortex-R4F and VFP3-D16

[Peter Maydell]

On 1 March 2013 11:21, Fabien Chouteau <address@hidden> wrote:
> On 03/01/2013 11:40 AM, Peter Maydell wrote:
>> On 1 March 2013 10:13, Fabien Chouteau <address@hidden> wrote:
>>> TMS570 are configured for big-endian only, so this is not a
>>> problem for me.
>>
>> Do you mean they are BE8 for load/stores always (ie SCTLR.EE is
>> 1, or that they are both BE8 for load/stores and also for
>> instruction fetches (ie that SCTLR.IE is also 1) ?
>>
>> Endianness in ARM is not as simple as a single flag saying
>> "big or little"...
>>
>
> I'm new to this ARM architecture so I will just quote the doc.
>
> TMS570LS31x/21x Technical Reference Manual:
>
> "The TMS570 family is based on the ARM® CortexTM-R4F core. ARM has
> designed this core to be used in big-endian and little-endian systems.
> For the TI TMS570 family, the endianness has been configured to BE32."

That is confusing, because ARM's R4F Technical Reference Manual
says "The processor does not support word-invariant big-endianness
(BE)-32"...

(http://translatedcode.wordpress.com/2012/04/02/this-end-up/
has a quick summary of what the various flavours of ARM
endianness actually mean.)

I think you're going to have to run some tests on the actual
hardware to find out what it really does. Specifically, what
are the values of SCTLR.IE, SCTLR.EE and CPSR.E when you think
you're in big-endian mode? (We need to sort out what parts of
the behaviour you're seeing are the CPU itself and what parts
are the SoC/board doing endianness flipping externally to the
CPU.)

thanks
-- PMM