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[Qemu-devel] [PATCH 04/10] target-arm: Remove uses of gen_{ld, st}* from
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From: |
Peter Maydell |
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Subject: |
[Qemu-devel] [PATCH 04/10] target-arm: Remove uses of gen_{ld, st}* from Neon code |
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Date: |
Thu, 23 May 2013 12:59:58 +0100 |
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/translate.c | 46 ++++++++++++++++++++++++++++------------------
1 file changed, 28 insertions(+), 18 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 7ce9a1c..057b180 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -2572,18 +2572,18 @@ static void gen_neon_dup_high16(TCGv_i32 var)
static TCGv_i32 gen_load_and_replicate(DisasContext *s, TCGv_i32 addr, int
size)
{
/* Load a single Neon element and replicate into a 32 bit TCG reg */
- TCGv_i32 tmp;
+ TCGv_i32 tmp = tcg_temp_new_i32();
switch (size) {
case 0:
- tmp = gen_ld8u(addr, IS_USER(s));
+ tcg_gen_qemu_ld8u(tmp, addr, IS_USER(s));
gen_neon_dup_u8(tmp, 0);
break;
case 1:
- tmp = gen_ld16u(addr, IS_USER(s));
+ tcg_gen_qemu_ld16u(tmp, addr, IS_USER(s));
gen_neon_dup_low16(tmp);
break;
case 2:
- tmp = gen_ld32(addr, IS_USER(s));
+ tcg_gen_qemu_ld32u(tmp, addr, IS_USER(s));
break;
default: /* Avoid compiler warnings. */
abort();
@@ -3872,18 +3872,22 @@ static int disas_neon_ls_insn(CPUARMState * env,
DisasContext *s, uint32_t insn)
for (pass = 0; pass < 2; pass++) {
if (size == 2) {
if (load) {
- tmp = gen_ld32(addr, IS_USER(s));
+ tmp = tcg_temp_new_i32();
+ tcg_gen_qemu_ld32u(tmp, addr, IS_USER(s));
neon_store_reg(rd, pass, tmp);
} else {
tmp = neon_load_reg(rd, pass);
- gen_st32(tmp, addr, IS_USER(s));
+ tcg_gen_qemu_st32(tmp, addr, IS_USER(s));
+ tcg_temp_free_i32(tmp);
}
tcg_gen_addi_i32(addr, addr, stride);
} else if (size == 1) {
if (load) {
- tmp = gen_ld16u(addr, IS_USER(s));
+ tmp = tcg_temp_new_i32();
+ tcg_gen_qemu_ld16u(tmp, addr, IS_USER(s));
tcg_gen_addi_i32(addr, addr, stride);
- tmp2 = gen_ld16u(addr, IS_USER(s));
+ tmp2 = tcg_temp_new_i32();
+ tcg_gen_qemu_ld16u(tmp2, addr, IS_USER(s));
tcg_gen_addi_i32(addr, addr, stride);
tcg_gen_shli_i32(tmp2, tmp2, 16);
tcg_gen_or_i32(tmp, tmp, tmp2);
@@ -3893,16 +3897,19 @@ static int disas_neon_ls_insn(CPUARMState * env,
DisasContext *s, uint32_t insn)
tmp = neon_load_reg(rd, pass);
tmp2 = tcg_temp_new_i32();
tcg_gen_shri_i32(tmp2, tmp, 16);
- gen_st16(tmp, addr, IS_USER(s));
+ tcg_gen_qemu_st16(tmp, addr, IS_USER(s));
+ tcg_temp_free_i32(tmp);
tcg_gen_addi_i32(addr, addr, stride);
- gen_st16(tmp2, addr, IS_USER(s));
+ tcg_gen_qemu_st16(tmp2, addr, IS_USER(s));
+ tcg_temp_free_i32(tmp2);
tcg_gen_addi_i32(addr, addr, stride);
}
} else /* size == 0 */ {
if (load) {
TCGV_UNUSED_I32(tmp2);
for (n = 0; n < 4; n++) {
- tmp = gen_ld8u(addr, IS_USER(s));
+ tmp = tcg_temp_new_i32();
+ tcg_gen_qemu_ld8u(tmp, addr, IS_USER(s));
tcg_gen_addi_i32(addr, addr, stride);
if (n == 0) {
tmp2 = tmp;
@@ -3922,7 +3929,8 @@ static int disas_neon_ls_insn(CPUARMState * env,
DisasContext *s, uint32_t insn)
} else {
tcg_gen_shri_i32(tmp, tmp2, n * 8);
}
- gen_st8(tmp, addr, IS_USER(s));
+ tcg_gen_qemu_st8(tmp, addr, IS_USER(s));
+ tcg_temp_free_i32(tmp);
tcg_gen_addi_i32(addr, addr, stride);
}
tcg_temp_free_i32(tmp2);
@@ -4042,15 +4050,16 @@ static int disas_neon_ls_insn(CPUARMState * env,
DisasContext *s, uint32_t insn)
load_reg_var(s, addr, rn);
for (reg = 0; reg < nregs; reg++) {
if (load) {
+ tmp = tcg_temp_new_i32();
switch (size) {
case 0:
- tmp = gen_ld8u(addr, IS_USER(s));
+ tcg_gen_qemu_ld8u(tmp, addr, IS_USER(s));
break;
case 1:
- tmp = gen_ld16u(addr, IS_USER(s));
+ tcg_gen_qemu_ld16u(tmp, addr, IS_USER(s));
break;
case 2:
- tmp = gen_ld32(addr, IS_USER(s));
+ tcg_gen_qemu_ld32u(tmp, addr, IS_USER(s));
break;
default: /* Avoid compiler warnings. */
abort();
@@ -4068,15 +4077,16 @@ static int disas_neon_ls_insn(CPUARMState * env,
DisasContext *s, uint32_t insn)
tcg_gen_shri_i32(tmp, tmp, shift);
switch (size) {
case 0:
- gen_st8(tmp, addr, IS_USER(s));
+ tcg_gen_qemu_st8(tmp, addr, IS_USER(s));
break;
case 1:
- gen_st16(tmp, addr, IS_USER(s));
+ tcg_gen_qemu_st16(tmp, addr, IS_USER(s));
break;
case 2:
- gen_st32(tmp, addr, IS_USER(s));
+ tcg_gen_qemu_st32(tmp, addr, IS_USER(s));
break;
}
+ tcg_temp_free_i32(tmp);
}
rd += stride;
tcg_gen_addi_i32(addr, addr, 1 << size);
--
1.7.9.5
- [Qemu-devel] [PATCH 00/10] target-arm: fix TCGv usage (AArch64 prep), Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 09/10] target-arm: Remove gen_{ld, st}* definitions, Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 07/10] target-arm: Remove gen_{ld, st}* from Thumb insns, Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 03/10] target-arm: Remove uses of gen_{ld, st}* from iWMMXt code, Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 06/10] target-arm: Remove gen_{ld, st}* from basic ARM insns, Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 01/10] target-arm: Don't use TCGv when we mean TCGv_i32, Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 04/10] target-arm: Remove uses of gen_{ld, st}* from Neon code,
Peter Maydell <=
- [Qemu-devel] [PATCH 08/10] target-arm: Remove gen_{ld, st}* from thumb2 decoder, Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 10/10] target-arm: Abstract out load/store from a vaddr in AArch32, Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 05/10] target-arm: Remove use of gen_{ld, st}* from ldrex/strex, Peter Maydell, 2013/05/23
- [Qemu-devel] [PATCH 02/10] target-arm: Remove gen_ld64() and gen_st64(), Peter Maydell, 2013/05/23
- Re: [Qemu-devel] [PATCH 00/10] target-arm: fix TCGv usage (AArch64 prep), Blue Swirl, 2013/05/26