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[Qemu-devel] [PULL 3/8] target-arm: explicitly decode SEVL instruction
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 3/8] target-arm: explicitly decode SEVL instruction |
Date: |
Mon, 15 Jul 2013 17:16:57 +0100 |
From: Mans Rullgard <address@hidden>
The ARMv8 SEVL instruction is in the architectural hint space already
emulated as nop. This makes the decoding of SEVL explicit for clarity.
Signed-off-by: Mans Rullgard <address@hidden>
Message-id: address@hidden
[PMM: added 'SEVL' to the TODO comment]
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/translate.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index b7663dd..7b50c8c 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -3501,7 +3501,8 @@ static void gen_nop_hint(DisasContext *s, int val)
break;
case 2: /* wfe */
case 4: /* sev */
- /* TODO: Implement SEV and WFE. May help SMP performance. */
+ case 5: /* sevl */
+ /* TODO: Implement SEV, SEVL and WFE. May help SMP performance. */
default: /* nop */
break;
}
--
1.7.9.5
- [Qemu-devel] [PULL 0/8] target-arm queue, Peter Maydell, 2013/07/15
- [Qemu-devel] [PULL 2/8] target-arm: implement LDA/STL instructions, Peter Maydell, 2013/07/15
- [Qemu-devel] [PULL 7/8] target-arm: avoid undefined behaviour when writing TTBCR, Peter Maydell, 2013/07/15
- [Qemu-devel] [PULL 6/8] target-arm/helper.c: Allow const opaques in arm CP, Peter Maydell, 2013/07/15
- [Qemu-devel] [PULL 8/8] target-arm: Avoid g_hash_table_get_keys(), Peter Maydell, 2013/07/15
- [Qemu-devel] [PULL 4/8] target-arm/helper.c: OMAP/StrongARM cp15 crn=0 cleanup, Peter Maydell, 2013/07/15
- [Qemu-devel] [PULL 1/8] target-arm: add feature flag for ARMv8, Peter Maydell, 2013/07/15
- [Qemu-devel] [PULL 5/8] target-arm/helper.c: Implement MIDR aliases, Peter Maydell, 2013/07/15
- [Qemu-devel] [PULL 3/8] target-arm: explicitly decode SEVL instruction,
Peter Maydell <=