qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/2] Add Enhanced Three-Speed Etherne


From: Alexander Graf
Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/2] Add Enhanced Three-Speed Ethernet Controller (eTSEC)
Date: Wed, 17 Jul 2013 10:29:43 +0200


Am 17.07.2013 um 10:24 schrieb Fabien Chouteau <address@hidden>:

> On 07/16/2013 06:54 PM, Scott Wood wrote:
>> On 07/16/2013 11:15:51 AM, Fabien Chouteau wrote:
>>> On 07/16/2013 05:37 PM, Alexander Graf wrote:
>>>> On 07/16/2013 05:28 PM, Fabien Chouteau wrote:
>>>>> On 07/16/2013 04:06 AM, Scott Wood wrote:
>>>>>> On 07/10/2013 12:10:02 PM, Fabien Chouteau wrote:
>>>>>>> This implementation doesn't include ring priority, TCP/IP Off-Load, QoS.
>>>>>>> 
>>>>>>> Signed-off-by: Fabien Chouteau<address@hidden>
>>>>>> From the code comments I gather this has been tested on VxWorks.  Has it
>>>>>> been tested on Linux, or anywhere else?
>>>>> You're right, as I said in the cover letter, this has only been tested on 
>>>>> vxWorks.
>>>> 
>>>> Could you please give it a try? IIRC eTSEC support should be in upstream 
>>>> Linux.
>>> 
>>> I don't have time for that. As I said in the cover letter, I submit this
>>> patch for those interested in eTSEC, but I won't be able to test/fix it
>>> for Linux.
>> 
>> Could you please at least document more fully the known limitations, such as 
>> "I'm only interested in 32bits address spaces"?
> 
> I will, but this device is very complex and I don't even know all the
> limitation of my implementation ;)
> 
>>>>>>> +    /* ring_base = (etsec->regs[RBASEH].value&  0xF)<<  32; */
>>>>>>> +    ring_base     += etsec->regs[RBASE0 + ring_nbr].value&  ~0x7;
>>>>>>> +    start_bd_addr  = bd_addr = etsec->regs[RBPTR0 + ring_nbr].value&  
>>>>>>> ~0x7;
>>>>>> What about RBDBPH (upper bits of physical address)?  Likewise for TX.
>>>>> I'm only interested in 32bits address spaces, so RBASEH, TBASEH, RBDBPH 
>>>>> or TBDBPH.
>>>> 
>>>> Why? I thought e500mc and above can access more than 32bits of physical 
>>>> address space?
>>> 
>>> Yes but this is not emulated by QEMU, right? sizeof (hwaddr) for
>>> qemu-system-ppc is 8...
>> 
>> 36bit physical is emulated by QEMU.  Currently we put CCSR in a place that 
>> would make it difficult to use memory above 4G, but that should change at 
>> some point.
> 
> 
> But hwaddr is 32 bits, how could you call cpu_physical_memory_read()? to
> a 36bits address?

8 x 8 = 64, no? :)

Alex

> 
> Regards,
> 
> -- 
> Fabien Chouteau



reply via email to

[Prev in Thread] Current Thread [Next in Thread]