[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 9/9] PPC: E500: Add PlatBus device tree walker
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PATCH 9/9] PPC: E500: Add PlatBus device tree walker |
Date: |
Mon, 22 Jul 2013 19:50:11 +0200 |
We need to tell the guest where devices are in its physical address space
and how they are connected to IRQ lines.
This patch adds a simply PlatBus walker that generates device tree chunks
for every device it finds. The only device it knows how to handle today
is a serial port, but that may change in the future.
Signed-off-by: Alexander Graf <address@hidden>
---
hw/ppc/e500.c | 54 ++++++++++++++++++++++++++++++++++++++++++++++++++----
1 file changed, 50 insertions(+), 4 deletions(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 8548622..e0d0a19 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -38,6 +38,7 @@
#include "hw/pci-host/ppce500.h"
#include "hw/platbus/bridge.h"
#include "hw/platbus/device.h"
+#include "hw/char/serial-platbus.h"
#define EPAPR_MAGIC (0x45504150)
#define BINARY_DEVICE_TREE_FILE "mpc8544ds.dtb"
@@ -108,7 +109,7 @@ static uint32_t *pci_map_create(void *fdt, uint32_t mpic,
int first_slot,
}
static void dt_serial_create(void *fdt, unsigned long long offset,
- const char *soc, const char *mpic,
+ const char *soc, const char *mpic, int irq,
const char *alias, int idx, bool defcon)
{
char ser[128];
@@ -120,7 +121,7 @@ static void dt_serial_create(void *fdt, unsigned long long
offset,
qemu_devtree_setprop_cells(fdt, ser, "reg", offset, 0x100);
qemu_devtree_setprop_cell(fdt, ser, "cell-index", idx);
qemu_devtree_setprop_cell(fdt, ser, "clock-frequency", 0);
- qemu_devtree_setprop_cells(fdt, ser, "interrupts", 42, 2);
+ qemu_devtree_setprop_cells(fdt, ser, "interrupts", irq, 2);
qemu_devtree_setprop_phandle(fdt, ser, "interrupt-parent", mpic);
qemu_devtree_setprop_string(fdt, "/aliases", alias, ser);
@@ -129,6 +130,42 @@ static void dt_serial_create(void *fdt, unsigned long long
offset,
}
}
+static void platbus_create_devtree(DeviceState *dev, void *fdt,
+ const char *node, uint64_t addr,
+ const char *mpic, int irq_start,
+ int nr_irqs)
+{
+ PlatBusBridgeState *s = PLATBUS_BRIDGE(dev);
+ BusChild *kid;
+ const char platcomp[] = "qemu,platbus\0simple-bus";
+ int serial_idx = 2;
+
+ qemu_devtree_setprop(fdt, node, "compatible", platcomp, sizeof(platcomp));
+ qemu_devtree_setprop_string(fdt, node, "device_type", "platbus");
+
+ /* Our platbus hole is less than 32bit big, so 1 cell is enough for address
+ and size */
+ qemu_devtree_setprop_cells(fdt, node, "#size-cells", 1);
+ qemu_devtree_setprop_cells(fdt, node, "#address-cells", 1);
+ qemu_devtree_setprop_cells(fdt, node, "ranges", 0, addr >> 32, addr,
+ PLATBUS_HOLE);
+
+ qemu_devtree_setprop_phandle(fdt, node, "interrupt-parent", mpic);
+
+ QTAILQ_FOREACH(kid, &s->bus.parent_obj.children, sibling) {
+ DeviceState *dev = kid->child;
+ PlatBusDeviceState *pbd = PLATBUS_DEVICE(dev);
+
+ if (PLATBUS_SERIAL(dev)) {
+ char *alias = g_strdup_printf("serial%d", serial_idx);
+ dt_serial_create(fdt, pbd->plat_region_addrs[0], node,
+ mpic, irq_start + pbd->plat_irqs[0], alias,
+ serial_idx, serial_idx == 0);
+ serial_idx++;
+ }
+ }
+}
+
static int ppce500_load_device_tree(PPCE500Params *params,
hwaddr addr,
hwaddr initrd_base,
@@ -136,6 +173,7 @@ static int ppce500_load_device_tree(PPCE500Params *params,
bool dry_run)
{
CPUPPCState *env = first_cpu->env_ptr;
+ DeviceState *platbus;
int ret = -1;
uint64_t mem_reg_property[] = { 0, cpu_to_be64(params->ram_size) };
int fdt_size;
@@ -310,9 +348,9 @@ static int ppce500_load_device_tree(PPCE500Params *params,
* devices in reverse order to the dt.
*/
dt_serial_create(fdt, MPC8544_SERIAL1_REGS_OFFSET,
- soc, mpic, "serial1", 1, false);
+ soc, mpic, 42, "serial1", 1, false);
dt_serial_create(fdt, MPC8544_SERIAL0_REGS_OFFSET,
- soc, mpic, "serial0", 0, true);
+ soc, mpic, 42, "serial0", 0, true);
snprintf(gutil, sizeof(gutil), "%s/address@hidden", soc,
MPC8544_UTIL_OFFSET);
@@ -367,6 +405,14 @@ static int ppce500_load_device_tree(PPCE500Params *params,
qemu_devtree_setprop_cell(fdt, pci, "#address-cells", 3);
qemu_devtree_setprop_string(fdt, "/aliases", "pci0", pci);
+ platbus = qdev_find_recursive(sysbus_get_default(), "platbus");
+ if (platbus) {
+ qemu_devtree_add_subnode(fdt, "/platbus");
+ platbus_create_devtree(platbus, fdt, "/platbus", E500_PLATBUS_BASE,
+ mpic, E500_PLATBUS_FIRST_IRQ,
+ E500_PLATBUS_NUM_IRQS);
+ }
+
params->fixup_devtree(params, fdt);
if (toplevel_compat) {
--
1.8.1.4
- [Qemu-devel] [PATCH 7/9] PPC: Add PlatBus Serial to default configs, (continued)
- [Qemu-devel] [PATCH 7/9] PPC: Add PlatBus Serial to default configs, Alexander Graf, 2013/07/22
- [Qemu-devel] [PATCH 2/9] PlatBus: Add abstract Platform Device, Alexander Graf, 2013/07/22
- [Qemu-devel] [PATCH 4/9] PlatBus: Hook up into Makefile system, Alexander Graf, 2013/07/22
- [Qemu-devel] [PATCH 5/9] PPC: Add platform bus to the default compile set, Alexander Graf, 2013/07/22
- [Qemu-devel] [PATCH 8/9] PPC: E500: Spawn PlatBus bridge for ppce500 machine, Alexander Graf, 2013/07/22
- [Qemu-devel] [PATCH 6/9] PlatBus: Add serial-platbus device, Alexander Graf, 2013/07/22
[Qemu-devel] [PATCH 9/9] PPC: E500: Add PlatBus device tree walker,
Alexander Graf <=
Re: [Qemu-devel] [PATCH 0/9] Add platform bus, Peter Maydell, 2013/07/22
- Re: [Qemu-devel] [PATCH 0/9] Add platform bus, Alexander Graf, 2013/07/22
- Re: [Qemu-devel] [PATCH 0/9] Add platform bus, Paolo Bonzini, 2013/07/23
- Re: [Qemu-devel] [PATCH 0/9] Add platform bus, Peter Maydell, 2013/07/23
- Re: [Qemu-devel] [PATCH 0/9] Add platform bus, Paolo Bonzini, 2013/07/23
- Re: [Qemu-devel] [PATCH 0/9] Add platform bus, Peter Maydell, 2013/07/23
- Re: [Qemu-devel] [PATCH 0/9] Add platform bus, Paolo Bonzini, 2013/07/23
- Re: [Qemu-devel] [PATCH 0/9] Add platform bus, Anthony Liguori, 2013/07/23
- Re: [Qemu-devel] [PATCH 0/9] Add platform bus, Peter Maydell, 2013/07/23
Re: [Qemu-devel] [PATCH 0/9] Add platform bus, François Revol, 2013/07/23