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Re: [Qemu-devel] [PATCH 00/28] Memory API for 1.6: fix I/O port endianne


From: Hervé Poussineau
Subject: Re: [Qemu-devel] [PATCH 00/28] Memory API for 1.6: fix I/O port endianness mess
Date: Mon, 22 Jul 2013 22:16:52 +0200
User-agent: Thunderbird 2.0.0.23 (Windows/20090812)

Paolo Bonzini a écrit :
Il 22/07/2013 17:04, Peter Maydell ha scritto:
On 22 July 2013 15:36, Paolo Bonzini <address@hidden> wrote:
Il 22/07/2013 16:32, Peter Maydell ha scritto:
In the long term it would be good to identify which boards
were using isa_mmio purely for the benefit of old_portio
(which I think is basically "boards where the CPU has no
concept of port I/O instructions").
All of them.  Only i386/x86_64 has I/O space, as far as I know.
Sounds plausible. I had wondered if our ISA bus infrastructure
assumed that ISA device IO ports live in the system IO space,
but it doesn't.

No, luckily it doesn't, and neither should the PCI-to-ISA bridges as you
found out---they do not after these patches.  PReP is an exception, but
I think it could be rewritten to use an IOMMU memory region.

PReP PCI I/O area is located at 0x80000000, up to 0xbf7fffff (in main memory space region), while ISA I/O area is at 0x80000000, up to 0x8000ffff (size=64KB)

However, as they are overlapped, some strange things can happen.
For example, IBM 40p firmware configures the PCI SCSI bar at 0x20000000 (ie 0xa0000000 in main memory), while Linux sets bar to 0x1000 (ie 0x80001000 in main memory), ie also in ISA I/O space.

I don't know exactly what you mean by an "IOMMU memory region", but how would you modelize it, so that 0x80001000 and 0xa0000000 accesses are redirected to PCI SCSI card, while 0x800003f8 redirects (for example) to an ISA serial port? If you create a new memory region for ISA I/O space, and you redirect all accesses from 0x80000000-0x8000ffff to this new address space, 0x80001000 won't work to access the SCSI I/O bar (located in the PCI I/O address space).

That's why I think the i82378 device should not create a whole new address space for ISA I/O space, but use the first 64KB of the PCI I/O space.

BTW, I've a patch to really cleanup i82378 implementation (47 insertions, 175 deletions). Should I send it now, during 1.6 soft freeze?

Hervé




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