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Re: [Qemu-devel] [PATCH qom-cpu for-next 1/2] cpu: Use QTAILQ for CPU li


From: Andreas Färber
Subject: Re: [Qemu-devel] [PATCH qom-cpu for-next 1/2] cpu: Use QTAILQ for CPU list
Date: Wed, 21 Aug 2013 18:32:54 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130801 Thunderbird/17.0.8

Am 21.08.2013 16:36, schrieb Peter Maydell:
> On 21 August 2013 15:12, Andreas Färber <address@hidden> wrote:
> 
>> -    for (i = 0, cpu = first_cpu; i < s->num_cpu; i++, cpu =
>> cpu->next_cpu) {
>> +    i = 0;
>> +    CPU_FOREACH(cpu) {
>>          DeviceState *cpudev = DEVICE(cpu);
>>          int ppibase = s->num_irq - 32 + i * 32;
>> +
>> +        if (i < s->num_cpu) {
>> +            break;
>> +        }
>> +
>>          /* physical timer; we wire it up to the non-secure timer's ID,
>>           * since a real A15 always has TrustZone but QEMU doesn't.
>>           */
>> @@ -83,6 +89,7 @@ static int a15mp_priv_init(SysBusDevice *dev)
>>          /* virtual timer */
>>          qdev_connect_gpio_out(cpudev, 1,
>>                                qdev_get_gpio_in(s->gic, ppibase + 27));
>> +        i++;
>>      }
> 
> It seems a bit ugly to have to both enumerate the CPUs
> via CPU_FOREACH and update an index i simultaneously.

Same for the original code. :)

> Isn't there any way to either say "give me the CPU pointer for
> CPU i" or "give me the index i of this CPU" ?

There is:

diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c
index 9d0e27e..1263b12 100644
--- a/hw/cpu/a15mpcore.c
+++ b/hw/cpu/a15mpcore.c
@@ -50,7 +50,6 @@ static int a15mp_priv_init(SysBusDevice *dev)
     SysBusDevice *busdev;
     const char *gictype = "arm_gic";
     int i;
-    CPUState *cpu;

     if (kvm_irqchip_in_kernel()) {
         gictype = "kvm-arm-gic";
@@ -72,15 +71,10 @@ static int a15mp_priv_init(SysBusDevice *dev)
     /* Wire the outputs from each CPU's generic timer to the
      * appropriate GIC PPI inputs
      */
-    i = 0;
-    CPU_FOREACH(cpu) {
-        DeviceState *cpudev = DEVICE(cpu);
+    for (i = 0; i < s->num_cpu; i++) {
+        DeviceState *cpudev = DEVICE(qemu_get_cpu(i));
         int ppibase = s->num_irq - 32 + i * 32;

-        if (i < s->num_cpu) {
-            break;
-        }
-
         /* physical timer; we wire it up to the non-secure timer's ID,
          * since a real A15 always has TrustZone but QEMU doesn't.
          */
@@ -89,7 +83,6 @@ static int a15mp_priv_init(SysBusDevice *dev)
         /* virtual timer */
         qdev_connect_gpio_out(cpudev, 1,
                               qdev_get_gpio_in(s->gic, ppibase + 27));
-        i++;
     }

     /* Memory map (addresses are offsets from PERIPHBASE):


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