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[Qemu-devel] [PATCH 17/19] tcg-i64: Reduce code duplication in tcg_out_q
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 17/19] tcg-i64: Reduce code duplication in tcg_out_qemu_ld |
Date: |
Thu, 5 Sep 2013 23:50:39 -0700 |
The only differences were in the bswap insns emitted.
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/ia64/tcg-target.c | 60 ++++++++++++++++++++-------------------------------
1 file changed, 23 insertions(+), 37 deletions(-)
diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
index 819bca3..6355f32 100644
--- a/tcg/ia64/tcg-target.c
+++ b/tcg/ia64/tcg-target.c
@@ -1647,13 +1647,13 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const
TCGArg *args,
OPC_LD1_M1, OPC_LD2_M1, OPC_LD4_M1, OPC_LD8_M1
};
int addr_reg, data_reg, mem_index;
- TCGMemOp s_bits, bswap;
+ TCGMemOp s_bits;
+ uint64_t bswap1, bswap2;
data_reg = *args++;
addr_reg = *args++;
mem_index = *args;
s_bits = opc & MO_SIZE;
- bswap = opc & MO_BSWAP;
/* Read the TLB entry */
tcg_out_qemu_tlb(s, addr_reg, s_bits,
@@ -1662,6 +1662,17 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const
TCGArg *args,
INSN_NOP_I, INSN_NOP_I);
/* P6 is the fast path, and P7 the slow path */
+
+ bswap1 = bswap2 = INSN_NOP_I;
+ if (opc & MO_BSWAP) {
+ bswap1 = tcg_opc_bswap64_i(TCG_REG_P6, TCG_REG_R8, TCG_REG_R8);
+ if (s_bits < MO_64) {
+ int shift = 64 - (8 << s_bits);
+ bswap2 = tcg_opc_i11(TCG_REG_P6, OPC_EXTR_U_I11,
+ TCG_REG_R8, TCG_REG_R8, shift, 63 - shift);
+ }
+ }
+
tcg_out_bundle(s, mLX,
tcg_opc_mov_a(TCG_REG_P7, TCG_REG_R56, TCG_AREG0),
tcg_opc_l2 ((tcg_target_long) qemu_ld_helpers[s_bits]),
@@ -1674,41 +1685,16 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const
TCGArg *args,
TCG_REG_R2, TCG_REG_R57),
tcg_opc_i21(TCG_REG_P7, OPC_MOV_I21, TCG_REG_B6,
TCG_REG_R3, 0));
- if (bswap && s_bits == MO_16) {
- tcg_out_bundle(s, MmI,
- tcg_opc_m1 (TCG_REG_P6, opc_ld_m1[s_bits],
- TCG_REG_R8, TCG_REG_R2),
- tcg_opc_m1 (TCG_REG_P7, OPC_LD8_M1, TCG_REG_R1,
TCG_REG_R2),
- tcg_opc_i12(TCG_REG_P6, OPC_DEP_Z_I12,
- TCG_REG_R8, TCG_REG_R8, 15, 15));
- } else if (bswap && s_bits == MO_32) {
- tcg_out_bundle(s, MmI,
- tcg_opc_m1 (TCG_REG_P6, opc_ld_m1[s_bits],
- TCG_REG_R8, TCG_REG_R2),
- tcg_opc_m1 (TCG_REG_P7, OPC_LD8_M1, TCG_REG_R1,
TCG_REG_R2),
- tcg_opc_i12(TCG_REG_P6, OPC_DEP_Z_I12,
- TCG_REG_R8, TCG_REG_R8, 31, 31));
- } else {
- tcg_out_bundle(s, mmI,
- tcg_opc_m1 (TCG_REG_P6, opc_ld_m1[s_bits],
- TCG_REG_R8, TCG_REG_R2),
- tcg_opc_m1 (TCG_REG_P7, OPC_LD8_M1, TCG_REG_R1,
TCG_REG_R2),
- INSN_NOP_I);
- }
- if (!bswap) {
- tcg_out_bundle(s, miB,
- tcg_opc_movi_a(TCG_REG_P7, TCG_REG_R58, mem_index),
- INSN_NOP_I,
- tcg_opc_b5 (TCG_REG_P7, OPC_BR_CALL_SPTK_MANY_B5,
- TCG_REG_B0, TCG_REG_B6));
- } else {
- tcg_out_bundle(s, miB,
- tcg_opc_movi_a(TCG_REG_P7, TCG_REG_R58, mem_index),
- tcg_opc_bswap64_i(TCG_REG_P6, TCG_REG_R8, TCG_REG_R8),
- tcg_opc_b5 (TCG_REG_P7, OPC_BR_CALL_SPTK_MANY_B5,
- TCG_REG_B0, TCG_REG_B6));
- }
-
+ tcg_out_bundle(s, MmI,
+ tcg_opc_m1 (TCG_REG_P6, opc_ld_m1[s_bits],
+ TCG_REG_R8, TCG_REG_R2),
+ tcg_opc_m1 (TCG_REG_P7, OPC_LD8_M1, TCG_REG_R1, TCG_REG_R2),
+ bswap1);
+ tcg_out_bundle(s, miB,
+ tcg_opc_movi_a(TCG_REG_P7, TCG_REG_R58, mem_index),
+ bswap2,
+ tcg_opc_b5 (TCG_REG_P7, OPC_BR_CALL_SPTK_MANY_B5,
+ TCG_REG_B0, TCG_REG_B6));
tcg_out_bundle(s, miI,
INSN_NOP_M,
INSN_NOP_I,
--
1.8.3.1
- [Qemu-devel] [PATCH 08/19] tcg-ia64: Use SUB_A3 and ADDS_A4 for subtraction, (continued)
- [Qemu-devel] [PATCH 08/19] tcg-ia64: Use SUB_A3 and ADDS_A4 for subtraction, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 07/19] tcg-ia64: Use ADDS for small addition, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 09/19] tcg-ia64: Use A3 form of logical operations, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 10/19] tcg-ia64 Introduce tcg_opc_mov_a, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 11/19] tcg-ia64 Introduce tcg_opc_movi_a, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 12/19] tcg-ia64 Introduce tcg_opc_ext_i, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 13/19] tcg-ia64 Introduce tcg_opc_bswap64_i, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 14/19] tcg-ia64: Re-bundle the tlb load, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 15/19] tcg-ia64: Move bswap for store into tlb load, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 16/19] tcg-ia64: Move tlb addend load into tlb read, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 17/19] tcg-i64: Reduce code duplication in tcg_out_qemu_ld,
Richard Henderson <=
- [Qemu-devel] [PATCH 18/19] tcg-ia64: Convert to new ldst helpers, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 19/19] tcg-ia64: Move part of softmmu slow path out of line, Richard Henderson, 2013/09/06