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Re: [Qemu-devel] [PATCH v2 08/12] target-arm: A64: add support for B and
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-devel] [PATCH v2 08/12] target-arm: A64: add support for B and BL insns |
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Date: |
Wed, 4 Dec 2013 22:43:03 +0000 |
On 4 December 2013 22:29, Richard Henderson <address@hidden> wrote:
> On 12/05/2013 11:14 AM, Peter Maydell wrote:
>> It doesn't need initialization, does it? It's a static array, and we
>> fill it as new temps are requested. So all we need to do is clear
>> the count so it starts "empty". Or have I missed something?
>
> Well, barring bugs, no.
>
> But I suggested clearing to TCGV_UNUSED for --enable-tcg-debug at minimum so
> as
> to catch those.
Bugs in the alloc/free code don't seem very likely since they're
very small functions which never change, but I guess it won't hurt.
-- PMM
[Qemu-devel] [PATCH v2 10/12] target-arm: A64: add support for conditional branches, Peter Maydell, 2013/12/04
[Qemu-devel] [PATCH v2 11/12] target-arm: A64: add support for 'test and branch' imm, Peter Maydell, 2013/12/04
[Qemu-devel] [PATCH v2 02/12] target-arm: A64: add set_pc cpu method, Peter Maydell, 2013/12/04
[Qemu-devel] [PATCH v2 06/12] target-arm: A64: provide skeleton for a64 insn decoding, Peter Maydell, 2013/12/04
[Qemu-devel] [PATCH v2 04/12] target-arm: Support fp registers in gdb stub, Peter Maydell, 2013/12/04
[Qemu-devel] [PATCH v2 12/12] target-arm: A64: add support for compare and branch imm, Peter Maydell, 2013/12/04