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[Qemu-devel] [PULL 00/37] target-arm queue
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 00/37] target-arm queue |
Date: |
Tue, 10 Dec 2013 14:42:56 +0000 |
Here's the target-arm queue; first pullreq since 1.7 went out.
Please pull. (I expect I'll do another pullreq in a week or
two which will have AArch64 KVM control and most of the A64
decoder changes in it...)
thanks
--PMM
The following changes since commit 8f84271da83c0e9f92aa7c1c2d0d3875bf0a5cb8:
target-mips: Use macro ARRAY_SIZE where possible (2013-12-09 16:44:04 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20131210
for you to fetch changes up to 74f1c6ddec8dc7566d9b75574bb006214cc7d3b4:
target-arm: fix TTBCR write masking (2013-12-10 13:28:50 +0000)
----------------------------------------------------------------
target-arm queue:
* support REFCNT register on integrator/cp board
* implement the A9MP's global timer
* add the 'virt' platform
* support '-cpu host' on KVM/ARM
* Cadence GEM ethernet device bugfixes
* Implement 32-bit ARMv8 VSEL, VMAXNM, VMINNM
* fix TTBCR write masking
* update 32 bit decoder to use new qemu_ld/st TCG opcodes
----------------------------------------------------------------
Edgar E. Iglesias (1):
net/cadence_gem: Update DMA rx descriptors as we process them
François LEGAL (1):
cpu/a9mpcore: Add Global Timer
Jan Petrous (1):
integrator/cp: add support for REFCNT register
John Rigby (1):
hw/arm/boot: Allow boards to provide an fdt blob
Peter Crosthwaite (16):
cpu/a9mpcore: rename timerbusdev variable
cpu/a9mpcore: reorder operations/declarations
hw/timer: Introduce ARM A9 Global Timer.
net/cadence_gem: Implement mac level loopback mode
net/cadence_gem: Don't assert against 0 buffer address
net/cadence_gem: simplify rx buf descriptor walking
net/cadence_gem: Prefetch rx descriptors ASAP
net/cadence_gem: Implement RX descriptor match mode flags
net/cadence_gem: Implement SAR match bit in rx desc
net/cadence_gem: Implement SAR (de)activation
net/cadence_gem: Add missing VMSTATE_END_OF_LIST
net/cadence_gem: Fix rx multi-fragment packets
net/cadence_gem: Fix small packet FCS stripping
net/cadence_gem: Fix register w1c logic
net/cadence_gem: Improve can_receive debug printfery
net/cadence_gem: Don't rx packets when no rx buffer available
Peter Maydell (9):
target-arm: Provide mechanism for getting KVM constants even if not
CONFIG_KVM
device_tree.c: Terminate the empty reservemap in create_device_tree()
target-arm: Provide PSCI constants to generic QEMU code
target-arm: Add ARMCPU field for Linux device-tree 'compatible' string
target-arm: Allow secondary KVM CPUs to be booted via PSCI
hw/arm: Add 'virt' platform
target-arm: Don't hardcode KVM target CPU to be A15
target-arm: Provide '-cpu host' when running KVM
hw/arm/virt: Support -cpu host
Richard Henderson (1):
target-arm: Use new qemu_ld/st opcodes
Sergey Fedorov (1):
target-arm: fix TTBCR write masking
Will Newton (6):
target-arm: Move call to disas_vfp_insn out of disas_coproc_insn.
target-arm: Implement ARMv8 VSEL instruction.
softfloat: Remove unused argument from MINMAX macro.
softfloat: Add minNum() and maxNum() functions to softfloat.
target-arm: Implement ARMv8 FP VMAXNM and VMINNM instructions.
target-arm: Implement ARMv8 SIMD VMAXNM and VMINNM instructions.
default-configs/arm-softmmu.mak | 1 +
device_tree.c | 4 +
fpu/softfloat.c | 38 +++-
hw/arm/Makefile.objs | 2 +-
hw/arm/boot.c | 32 +--
hw/arm/integratorcp.c | 13 +-
hw/arm/virt.c | 452 ++++++++++++++++++++++++++++++++++++++++
hw/cpu/a9mpcore.c | 44 ++--
hw/net/cadence_gem.c | 278 +++++++++++++++---------
hw/timer/Makefile.objs | 1 +
hw/timer/a9gtimer.c | 369 ++++++++++++++++++++++++++++++++
include/fpu/softfloat.h | 4 +
include/hw/arm/arm.h | 7 +
include/hw/cpu/a9mpcore.h | 4 +-
include/hw/timer/a9gtimer.h | 97 +++++++++
target-arm/cpu-qom.h | 11 +
target-arm/cpu.c | 59 ++++++
target-arm/cpu.h | 13 +-
target-arm/helper.c | 33 ++-
target-arm/helper.h | 5 +
target-arm/kvm-consts.h | 64 ++++++
target-arm/kvm.c | 243 ++++++++++++++++++++-
target-arm/kvm_arm.h | 55 +++++
target-arm/translate.c | 302 +++++++++++++++++++++++----
24 files changed, 1926 insertions(+), 205 deletions(-)
create mode 100644 hw/arm/virt.c
create mode 100644 hw/timer/a9gtimer.c
create mode 100644 include/hw/timer/a9gtimer.h
create mode 100644 target-arm/kvm-consts.h
- [Qemu-devel] [PULL 00/37] target-arm queue,
Peter Maydell <=
- [Qemu-devel] [PULL 02/37] cpu/a9mpcore: rename timerbusdev variable, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 16/37] net/cadence_gem: Implement mac level loopback mode, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 17/37] net/cadence_gem: Update DMA rx descriptors as we process them, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 36/37] target-arm: Use new qemu_ld/st opcodes, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 33/37] softfloat: Add minNum() and maxNum() functions to softfloat., Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 34/37] target-arm: Implement ARMv8 FP VMAXNM and VMINNM instructions., Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 32/37] softfloat: Remove unused argument from MINMAX macro., Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 31/37] target-arm: Implement ARMv8 VSEL instruction., Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 24/37] net/cadence_gem: Add missing VMSTATE_END_OF_LIST, Peter Maydell, 2013/12/10
- [Qemu-devel] [PULL 10/37] target-arm: Add ARMCPU field for Linux device-tree 'compatible' string, Peter Maydell, 2013/12/10