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Re: [Qemu-devel] [PATCH for-1.7 3/5] acpi unit-test: add test files
From: |
Michael S. Tsirkin |
Subject: |
Re: [Qemu-devel] [PATCH for-1.7 3/5] acpi unit-test: add test files |
Date: |
Tue, 10 Dec 2013 18:45:10 +0200 |
On Thu, Nov 21, 2013 at 09:33:23PM +0200, Marcel Apfelbaum wrote:
> Added unit-test's expected dsl files to be compared
> with the actual ACPI tables.
>
> Signed-off-by: Marcel Apfelbaum <address@hidden>
This one is not a good idea, and same for the
rest of the patches.
You don't want test to fail because IASL disassembler
decided to name a variable differenly.
Instead, add AML files in tests/acpi-test-data.
run disassembler on both expected and actual files.
> ---
> tests/acpi-test-data/pc/APIC.dsl | 103 ++
> tests/acpi-test-data/pc/DSDT.dsl | 1870 ++++++++++++++++++++++
> tests/acpi-test-data/pc/FACP.dsl | 99 ++
> tests/acpi-test-data/pc/FACS.dsl | 32 +
> tests/acpi-test-data/pc/HPET.dsl | 43 +
> tests/acpi-test-data/pc/SSDT.dsl | 634 ++++++++
> tests/acpi-test-data/q35/APIC.dsl | 103 ++
> tests/acpi-test-data/q35/DSDT.dsl | 3197
> +++++++++++++++++++++++++++++++++++++
> tests/acpi-test-data/q35/FACP.dsl | 99 ++
> tests/acpi-test-data/q35/FACS.dsl | 32 +
> tests/acpi-test-data/q35/HPET.dsl | 43 +
> tests/acpi-test-data/q35/MCFG.dsl | 36 +
> tests/acpi-test-data/q35/SSDT.dsl | 665 ++++++++
> 13 files changed, 6956 insertions(+)
> create mode 100644 tests/acpi-test-data/pc/APIC.dsl
> create mode 100644 tests/acpi-test-data/pc/DSDT.dsl
> create mode 100644 tests/acpi-test-data/pc/FACP.dsl
> create mode 100644 tests/acpi-test-data/pc/FACS.dsl
> create mode 100644 tests/acpi-test-data/pc/HPET.dsl
> create mode 100644 tests/acpi-test-data/pc/SSDT.dsl
> create mode 100644 tests/acpi-test-data/q35/APIC.dsl
> create mode 100644 tests/acpi-test-data/q35/DSDT.dsl
> create mode 100644 tests/acpi-test-data/q35/FACP.dsl
> create mode 100644 tests/acpi-test-data/q35/FACS.dsl
> create mode 100644 tests/acpi-test-data/q35/HPET.dsl
> create mode 100644 tests/acpi-test-data/q35/MCFG.dsl
> create mode 100644 tests/acpi-test-data/q35/SSDT.dsl
>
> diff --git a/tests/acpi-test-data/pc/APIC.dsl
> b/tests/acpi-test-data/pc/APIC.dsl
> new file mode 100644
> index 0000000..51397a5
> --- /dev/null
> +++ b/tests/acpi-test-data/pc/APIC.dsl
> @@ -0,0 +1,103 @@
> +/*
> + * Intel ACPI Component Architecture
> + * AML Disassembler version 20130823-64 [Oct 8 2013]
> + * Copyright (c) 2000 - 2013 Intel Corporation
> + *
> + * Disassembly of APIC, Wed Nov 20 09:17:47 2013
> + *
> + * ACPI Data Table [APIC]
> + *
> + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
> + */
> +
> +[000h 0000 4] Signature : "APIC" [Multiple APIC
> Description Table (MADT)]
> +[004h 0004 4] Table Length : 00000078
> +[008h 0008 1] Revision : 01
> +[009h 0009 1] Checksum : ED
> +[00Ah 0010 6] Oem ID : "BOCHS "
> +[010h 0016 8] Oem Table ID : "BXPCAPIC"
> +[018h 0024 4] Oem Revision : 00000001
> +[01Ch 0028 4] Asl Compiler ID : "BXPC"
> +[020h 0032 4] Asl Compiler Revision : 00000001
> +
> +[024h 0036 4] Local Apic Address : FEE00000
> +[028h 0040 4] Flags (decoded below) : 00000001
> + PC-AT Compatibility : 1
> +
> +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
> +[02Dh 0045 1] Length : 08
> +[02Eh 0046 1] Processor ID : 00
> +[02Fh 0047 1] Local Apic ID : 00
> +[030h 0048 4] Flags (decoded below) : 00000001
> + Processor Enabled : 1
> +
> +[034h 0052 1] Subtable Type : 01 [I/O APIC]
> +[035h 0053 1] Length : 0C
> +[036h 0054 1] I/O Apic ID : 00
> +[037h 0055 1] Reserved : 00
> +[038h 0056 4] Address : FEC00000
> +[03Ch 0060 4] Interrupt : 00000000
> +
> +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override]
> +[041h 0065 1] Length : 0A
> +[042h 0066 1] Bus : 00
> +[043h 0067 1] Source : 00
> +[044h 0068 4] Interrupt : 00000002
> +[048h 0072 2] Flags (decoded below) : 0000
> + Polarity : 0
> + Trigger Mode : 0
> +
> +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override]
> +[04Bh 0075 1] Length : 0A
> +[04Ch 0076 1] Bus : 00
> +[04Dh 0077 1] Source : 05
> +[04Eh 0078 4] Interrupt : 00000005
> +[052h 0082 2] Flags (decoded below) : 000D
> + Polarity : 1
> + Trigger Mode : 3
> +
> +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override]
> +[055h 0085 1] Length : 0A
> +[056h 0086 1] Bus : 00
> +[057h 0087 1] Source : 09
> +[058h 0088 4] Interrupt : 00000009
> +[05Ch 0092 2] Flags (decoded below) : 000D
> + Polarity : 1
> + Trigger Mode : 3
> +
> +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override]
> +[05Fh 0095 1] Length : 0A
> +[060h 0096 1] Bus : 00
> +[061h 0097 1] Source : 0A
> +[062h 0098 4] Interrupt : 0000000A
> +[066h 0102 2] Flags (decoded below) : 000D
> + Polarity : 1
> + Trigger Mode : 3
> +
> +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override]
> +[069h 0105 1] Length : 0A
> +[06Ah 0106 1] Bus : 00
> +[06Bh 0107 1] Source : 0B
> +[06Ch 0108 4] Interrupt : 0000000B
> +[070h 0112 2] Flags (decoded below) : 000D
> + Polarity : 1
> + Trigger Mode : 3
> +
> +[072h 0114 1] Subtable Type : 04 [Local APIC NMI]
> +[073h 0115 1] Length : 06
> +[074h 0116 1] Processor ID : FF
> +[075h 0117 2] Flags (decoded below) : 0000
> + Polarity : 0
> + Trigger Mode : 0
> +[077h 0119 1] Interrupt Input LINT : 01
> +
> +Raw Table Data: Length 120 (0x78)
> +
> + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 APICx.....BOCHS
> + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 BXPCAPIC....BXPC
> + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 ................
> + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 ................
> + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 ................
> + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A ................
> + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 ................
> + 0070: 0D 00 04 06 FF 00 00 01 ........
> diff --git a/tests/acpi-test-data/pc/DSDT.dsl
> b/tests/acpi-test-data/pc/DSDT.dsl
> new file mode 100644
> index 0000000..cbe7f31
> --- /dev/null
> +++ b/tests/acpi-test-data/pc/DSDT.dsl
> @@ -0,0 +1,1870 @@
> +/*
> + * Intel ACPI Component Architecture
> + * AML Disassembler version 20130823-64 [Oct 5 2013]
> + * Copyright (c) 2000 - 2013 Intel Corporation
> + *
> + * Disassembly of DSDT, Thu Nov 14 15:25:31 2013
> + *
> + * Original Table Header:
> + * Signature "DSDT"
> + * Length 0x00001137 (4407)
> + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support
> + * Checksum 0x4A
> + * OEM ID "BOCHS "
> + * OEM Table ID "BXPCDSDT"
> + * OEM Revision 0x00000001 (1)
> + * Compiler ID "BXPC"
> + * Compiler Version 0x00000001 (1)
> + */
> +DefinitionBlock ("DSDT.aml", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
> +{
> +
> + External (CPON, PkgObj)
> + External (NTFY, MethodObj) // 2 Arguments
> + External (P0E_, IntObj)
> + External (P0S_, IntObj)
> + External (P1E_, BuffObj)
> + External (P1L_, BuffObj)
> + External (P1S_, BuffObj)
> + External (P1V_, IntObj)
> + External (PCNT, MethodObj) // 2 Arguments
> +
> + Scope (\)
> + {
> + OperationRegion (DBG, SystemIO, 0x0402, One)
> + Field (DBG, ByteAcc, NoLock, Preserve)
> + {
> + DBGB, 8
> + }
> +
> + Method (DBUG, 1, NotSerialized)
> + {
> + ToHexString (Arg0, Local0)
> + ToBuffer (Local0, Local0)
> + Subtract (SizeOf (Local0), One, Local1)
> + Store (Zero, Local2)
> + While (LLess (Local2, Local1))
> + {
> + Store (DerefOf (Index (Local0, Local2)), DBGB)
> + Increment (Local2)
> + }
> +
> + Store (0x0A, DBGB)
> + }
> + }
> +
> + Scope (_SB)
> + {
> + Device (PCI0)
> + {
> + Name (_HID, EisaId ("PNP0A03")) // _HID: Hardware ID
> + Name (_ADR, Zero) // _ADR: Address
> + Name (_UID, One) // _UID: Unique ID
> + }
> + }
> +
> + Scope (_SB.PCI0)
> + {
> + Name (CRES, ResourceTemplate ()
> + {
> + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
> + 0x0000, // Granularity
> + 0x0000, // Range Minimum
> + 0x00FF, // Range Maximum
> + 0x0000, // Translation Offset
> + 0x0100, // Length
> + ,, )
> + IO (Decode16,
> + 0x0CF8, // Range Minimum
> + 0x0CF8, // Range Maximum
> + 0x01, // Alignment
> + 0x08, // Length
> + )
> + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode,
> EntireRange,
> + 0x0000, // Granularity
> + 0x0000, // Range Minimum
> + 0x0CF7, // Range Maximum
> + 0x0000, // Translation Offset
> + 0x0CF8, // Length
> + ,, , TypeStatic)
> + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode,
> EntireRange,
> + 0x0000, // Granularity
> + 0x0D00, // Range Minimum
> + 0xFFFF, // Range Maximum
> + 0x0000, // Translation Offset
> + 0xF300, // Length
> + ,, , TypeStatic)
> + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
> Cacheable, ReadWrite,
> + 0x00000000, // Granularity
> + 0x000A0000, // Range Minimum
> + 0x000BFFFF, // Range Maximum
> + 0x00000000, // Translation Offset
> + 0x00020000, // Length
> + ,, , AddressRangeMemory, TypeStatic)
> + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
> NonCacheable, ReadWrite,
> + 0x00000000, // Granularity
> + 0xE0000000, // Range Minimum
> + 0xFEBFFFFF, // Range Maximum
> + 0x00000000, // Translation Offset
> + 0x1EC00000, // Length
> + ,, _Y00, AddressRangeMemory, TypeStatic)
> + })
> + Name (CR64, ResourceTemplate ()
> + {
> + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
> Cacheable, ReadWrite,
> + 0x0000000000000000, // Granularity
> + 0x0000008000000000, // Range Minimum
> + 0x000000FFFFFFFFFF, // Range Maximum
> + 0x0000000000000000, // Translation Offset
> + 0x0000008000000000, // Length
> + ,, _Y01, AddressRangeMemory, TypeStatic)
> + })
> + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
> + {
> + CreateDWordField (CRES, \_SB.PCI0._Y00._MIN, PS32) // _MIN:
> Minimum Base Address
> + CreateDWordField (CRES, \_SB.PCI0._Y00._MAX, PE32) // _MAX:
> Maximum Base Address
> + CreateDWordField (CRES, \_SB.PCI0._Y00._LEN, PL32) // _LEN:
> Length
> + Store (P0S, PS32)
> + Store (P0E, PE32)
> + Store (Add (Subtract (P0E, P0S), One), PL32)
> + If (LEqual (P1V, Zero))
> + {
> + Return (CRES)
> + }
> +
> + CreateQWordField (CR64, \_SB.PCI0._Y01._MIN, PS64) // _MIN:
> Minimum Base Address
> + CreateQWordField (CR64, \_SB.PCI0._Y01._MAX, PE64) // _MAX:
> Maximum Base Address
> + CreateQWordField (CR64, \_SB.PCI0._Y01._LEN, PL64) // _LEN:
> Length
> + Store (P1S, PS64)
> + Store (P1E, PE64)
> + Store (P1L, PL64)
> + ConcatenateResTemplate (CRES, CR64, Local0)
> + Return (Local0)
> + }
> + }
> +
> + Scope (_SB)
> + {
> + Device (HPET)
> + {
> + Name (_HID, EisaId ("PNP0103")) // _HID: Hardware ID
> + Name (_UID, Zero) // _UID: Unique ID
> + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400)
> + Field (HPTM, DWordAcc, Lock, Preserve)
> + {
> + VEND, 32,
> + PRD, 32
> + }
> +
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Store (VEND, Local0)
> + Store (PRD, Local1)
> + ShiftRight (Local0, 0x10, Local0)
> + If (LOr (LEqual (Local0, Zero), LEqual (Local0, 0xFFFF)))
> + {
> + Return (Zero)
> + }
> +
> + If (LOr (LEqual (Local1, Zero), LGreater (Local1,
> 0x05F5E100)))
> + {
> + Return (Zero)
> + }
> +
> + Return (0x0F)
> + }
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + Memory32Fixed (ReadOnly,
> + 0xFED00000, // Address Base
> + 0x00000400, // Address Length
> + )
> + })
> + }
> + }
> +
> + Scope (_SB.PCI0)
> + {
> + Device (VGA)
> + {
> + Name (_ADR, 0x00020000) // _ADR: Address
> + OperationRegion (PCIC, PCI_Config, Zero, 0x04)
> + Field (PCIC, DWordAcc, NoLock, Preserve)
> + {
> + VEND, 32
> + }
> +
> + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State
> + {
> + Return (Zero)
> + }
> +
> + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State
> + {
> + Return (Zero)
> + }
> +
> + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
> + {
> + If (LEqual (VEND, 0x01001B36))
> + {
> + Return (0x03)
> + }
> + Else
> + {
> + Return (Zero)
> + }
> + }
> + }
> + }
> +
> + Scope (_SB.PCI0)
> + {
> + Device (PX13)
> + {
> + Name (_ADR, 0x00010003) // _ADR: Address
> + OperationRegion (P13C, PCI_Config, Zero, 0xFF)
> + }
> + }
> +
> + Scope (_SB.PCI0)
> + {
> + Device (ISA)
> + {
> + Name (_ADR, 0x00010000) // _ADR: Address
> + OperationRegion (P40C, PCI_Config, 0x60, 0x04)
> + Field (^PX13.P13C, AnyAcc, NoLock, Preserve)
> + {
> + Offset (0x5F),
> + , 7,
> + LPEN, 1,
> + Offset (0x67),
> + , 3,
> + CAEN, 1,
> + , 3,
> + CBEN, 1
> + }
> +
> + Name (FDEN, One)
> + }
> + }
> +
> + Scope (_SB.PCI0.ISA)
> + {
> + Device (RTC)
> + {
> + Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + IO (Decode16,
> + 0x0070, // Range Minimum
> + 0x0070, // Range Maximum
> + 0x10, // Alignment
> + 0x02, // Length
> + )
> + IRQNoFlags ()
> + {8}
> + IO (Decode16,
> + 0x0072, // Range Minimum
> + 0x0072, // Range Maximum
> + 0x02, // Alignment
> + 0x06, // Length
> + )
> + })
> + }
> +
> + Device (KBD)
> + {
> + Name (_HID, EisaId ("PNP0303")) // _HID: Hardware ID
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (0x0F)
> + }
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + IO (Decode16,
> + 0x0060, // Range Minimum
> + 0x0060, // Range Maximum
> + 0x01, // Alignment
> + 0x01, // Length
> + )
> + IO (Decode16,
> + 0x0064, // Range Minimum
> + 0x0064, // Range Maximum
> + 0x01, // Alignment
> + 0x01, // Length
> + )
> + IRQNoFlags ()
> + {1}
> + })
> + }
> +
> + Device (MOU)
> + {
> + Name (_HID, EisaId ("PNP0F13")) // _HID: Hardware ID
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (0x0F)
> + }
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + IRQNoFlags ()
> + {12}
> + })
> + }
> +
> + Device (FDC0)
> + {
> + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Store (FDEN, Local0)
> + If (LEqual (Local0, Zero))
> + {
> + Return (Zero)
> + }
> + Else
> + {
> + Return (0x0F)
> + }
> + }
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + IO (Decode16,
> + 0x03F2, // Range Minimum
> + 0x03F2, // Range Maximum
> + 0x00, // Alignment
> + 0x04, // Length
> + )
> + IO (Decode16,
> + 0x03F7, // Range Minimum
> + 0x03F7, // Range Maximum
> + 0x00, // Alignment
> + 0x01, // Length
> + )
> + IRQNoFlags ()
> + {6}
> + DMA (Compatibility, NotBusMaster, Transfer8, )
> + {2}
> + })
> + }
> +
> + Device (LPT)
> + {
> + Name (_HID, EisaId ("PNP0400")) // _HID: Hardware ID
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Store (LPEN, Local0)
> + If (LEqual (Local0, Zero))
> + {
> + Return (Zero)
> + }
> + Else
> + {
> + Return (0x0F)
> + }
> + }
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + IO (Decode16,
> + 0x0378, // Range Minimum
> + 0x0378, // Range Maximum
> + 0x08, // Alignment
> + 0x08, // Length
> + )
> + IRQNoFlags ()
> + {7}
> + })
> + }
> +
> + Device (COM1)
> + {
> + Name (_HID, EisaId ("PNP0501")) // _HID: Hardware ID
> + Name (_UID, One) // _UID: Unique ID
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Store (CAEN, Local0)
> + If (LEqual (Local0, Zero))
> + {
> + Return (Zero)
> + }
> + Else
> + {
> + Return (0x0F)
> + }
> + }
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + IO (Decode16,
> + 0x03F8, // Range Minimum
> + 0x03F8, // Range Maximum
> + 0x00, // Alignment
> + 0x08, // Length
> + )
> + IRQNoFlags ()
> + {4}
> + })
> + }
> +
> + Device (COM2)
> + {
> + Name (_HID, EisaId ("PNP0501")) // _HID: Hardware ID
> + Name (_UID, 0x02) // _UID: Unique ID
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Store (CBEN, Local0)
> + If (LEqual (Local0, Zero))
> + {
> + Return (Zero)
> + }
> + Else
> + {
> + Return (0x0F)
> + }
> + }
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + IO (Decode16,
> + 0x02F8, // Range Minimum
> + 0x02F8, // Range Maximum
> + 0x00, // Alignment
> + 0x08, // Length
> + )
> + IRQNoFlags ()
> + {3}
> + })
> + }
> + }
> +
> + Scope (_SB.PCI0)
> + {
> + OperationRegion (PCST, SystemIO, 0xAE00, 0x08)
> + Field (PCST, DWordAcc, NoLock, WriteAsZeros)
> + {
> + PCIU, 32,
> + PCID, 32
> + }
> +
> + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04)
> + Field (SEJ, DWordAcc, NoLock, WriteAsZeros)
> + {
> + B0EJ, 32
> + }
> +
> + Method (PCEJ, 1, NotSerialized)
> + {
> + Store (ShiftLeft (One, Arg0), B0EJ)
> + Return (Zero)
> + }
> +
> + Method (PCNF, 0, NotSerialized)
> + {
> + Store (Zero, Local0)
> + While (LLess (Local0, 0x1F))
> + {
> + Increment (Local0)
> + If (And (PCIU, ShiftLeft (One, Local0)))
> + {
> + PCNT (Local0, One)
> + }
> +
> + If (And (PCID, ShiftLeft (One, Local0)))
> + {
> + PCNT (Local0, 0x03)
> + }
> + }
> + }
> + }
> +
> + Scope (_SB)
> + {
> + Scope (PCI0)
> + {
> + Name (_PRT, Package (0x80) // _PRT: PCI Routing Table
> + {
> + Package (0x04)
> + {
> + 0xFFFF,
> + Zero,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0xFFFF,
> + One,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0xFFFF,
> + 0x02,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0xFFFF,
> + 0x03,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0001FFFF,
> + Zero,
> + LNKS,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0001FFFF,
> + One,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0001FFFF,
> + 0x02,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0001FFFF,
> + 0x03,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0002FFFF,
> + Zero,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0002FFFF,
> + One,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0002FFFF,
> + 0x02,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0002FFFF,
> + 0x03,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0003FFFF,
> + Zero,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0003FFFF,
> + One,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0003FFFF,
> + 0x02,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0003FFFF,
> + 0x03,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0004FFFF,
> + Zero,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0004FFFF,
> + One,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0004FFFF,
> + 0x02,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0004FFFF,
> + 0x03,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0005FFFF,
> + Zero,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0005FFFF,
> + One,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0005FFFF,
> + 0x02,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0005FFFF,
> + 0x03,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0006FFFF,
> + Zero,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0006FFFF,
> + One,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0006FFFF,
> + 0x02,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0006FFFF,
> + 0x03,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0007FFFF,
> + Zero,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0007FFFF,
> + One,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0007FFFF,
> + 0x02,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0007FFFF,
> + 0x03,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0008FFFF,
> + Zero,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0008FFFF,
> + One,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0008FFFF,
> + 0x02,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0008FFFF,
> + 0x03,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0009FFFF,
> + Zero,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0009FFFF,
> + One,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0009FFFF,
> + 0x02,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0009FFFF,
> + 0x03,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000AFFFF,
> + Zero,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000AFFFF,
> + One,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000AFFFF,
> + 0x02,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000AFFFF,
> + 0x03,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000BFFFF,
> + Zero,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000BFFFF,
> + One,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000BFFFF,
> + 0x02,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000BFFFF,
> + 0x03,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000CFFFF,
> + Zero,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000CFFFF,
> + One,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000CFFFF,
> + 0x02,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000CFFFF,
> + 0x03,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000DFFFF,
> + Zero,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000DFFFF,
> + One,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000DFFFF,
> + 0x02,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000DFFFF,
> + 0x03,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000EFFFF,
> + Zero,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000EFFFF,
> + One,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000EFFFF,
> + 0x02,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000EFFFF,
> + 0x03,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000FFFFF,
> + Zero,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000FFFFF,
> + One,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000FFFFF,
> + 0x02,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000FFFFF,
> + 0x03,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0010FFFF,
> + Zero,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0010FFFF,
> + One,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0010FFFF,
> + 0x02,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0010FFFF,
> + 0x03,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0011FFFF,
> + Zero,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0011FFFF,
> + One,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0011FFFF,
> + 0x02,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0011FFFF,
> + 0x03,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0012FFFF,
> + Zero,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0012FFFF,
> + One,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0012FFFF,
> + 0x02,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0012FFFF,
> + 0x03,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0013FFFF,
> + Zero,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0013FFFF,
> + One,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0013FFFF,
> + 0x02,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0013FFFF,
> + 0x03,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0014FFFF,
> + Zero,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0014FFFF,
> + One,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0014FFFF,
> + 0x02,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0014FFFF,
> + 0x03,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0015FFFF,
> + Zero,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0015FFFF,
> + One,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0015FFFF,
> + 0x02,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0015FFFF,
> + 0x03,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0016FFFF,
> + Zero,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0016FFFF,
> + One,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0016FFFF,
> + 0x02,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0016FFFF,
> + 0x03,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0017FFFF,
> + Zero,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0017FFFF,
> + One,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0017FFFF,
> + 0x02,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0017FFFF,
> + 0x03,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0018FFFF,
> + Zero,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0018FFFF,
> + One,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0018FFFF,
> + 0x02,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0018FFFF,
> + 0x03,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0019FFFF,
> + Zero,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0019FFFF,
> + One,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0019FFFF,
> + 0x02,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0019FFFF,
> + 0x03,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001AFFFF,
> + Zero,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001AFFFF,
> + One,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001AFFFF,
> + 0x02,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001AFFFF,
> + 0x03,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001BFFFF,
> + Zero,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001BFFFF,
> + One,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001BFFFF,
> + 0x02,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001BFFFF,
> + 0x03,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001CFFFF,
> + Zero,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001CFFFF,
> + One,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001CFFFF,
> + 0x02,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001CFFFF,
> + 0x03,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001DFFFF,
> + Zero,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001DFFFF,
> + One,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001DFFFF,
> + 0x02,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001DFFFF,
> + 0x03,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001EFFFF,
> + Zero,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001EFFFF,
> + One,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001EFFFF,
> + 0x02,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001EFFFF,
> + 0x03,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001FFFFF,
> + Zero,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001FFFFF,
> + One,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001FFFFF,
> + 0x02,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001FFFFF,
> + 0x03,
> + LNKB,
> + Zero
> + }
> + })
> + }
> +
> + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve)
> + {
> + PRQ0, 8,
> + PRQ1, 8,
> + PRQ2, 8,
> + PRQ3, 8
> + }
> +
> + Method (IQST, 1, NotSerialized)
> + {
> + If (And (0x80, Arg0))
> + {
> + Return (0x09)
> + }
> +
> + Return (0x0B)
> + }
> +
> + Method (IQCR, 1, Serialized)
> + {
> + Name (PRR0, ResourceTemplate ()
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,,
> _Y02)
> + {
> + 0x00000000,
> + }
> + })
> + CreateDWordField (PRR0, \_SB.IQCR._Y02._INT, PRRI) // _INT:
> Interrupts
> + If (LLess (Arg0, 0x80))
> + {
> + Store (Arg0, PRRI)
> + }
> +
> + Return (PRR0)
> + }
> +
> + Device (LNKA)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, Zero) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000005,
> + 0x0000000A,
> + 0x0000000B,
> + }
> + })
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (IQST (PRQ0))
> + }
> +
> + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
> + {
> + Or (PRQ0, 0x80, PRQ0)
> + }
> +
> + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource
> Settings
> + {
> + Return (IQCR (PRQ0))
> + }
> +
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + CreateDWordField (Arg0, 0x05, PRRI)
> + Store (PRRI, PRQ0)
> + }
> + }
> +
> + Device (LNKB)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, One) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000005,
> + 0x0000000A,
> + 0x0000000B,
> + }
> + })
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (IQST (PRQ1))
> + }
> +
> + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
> + {
> + Or (PRQ1, 0x80, PRQ1)
> + }
> +
> + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource
> Settings
> + {
> + Return (IQCR (PRQ1))
> + }
> +
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + CreateDWordField (Arg0, 0x05, PRRI)
> + Store (PRRI, PRQ1)
> + }
> + }
> +
> + Device (LNKC)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, 0x02) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000005,
> + 0x0000000A,
> + 0x0000000B,
> + }
> + })
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (IQST (PRQ2))
> + }
> +
> + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
> + {
> + Or (PRQ2, 0x80, PRQ2)
> + }
> +
> + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource
> Settings
> + {
> + Return (IQCR (PRQ2))
> + }
> +
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + CreateDWordField (Arg0, 0x05, PRRI)
> + Store (PRRI, PRQ2)
> + }
> + }
> +
> + Device (LNKD)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, 0x03) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000005,
> + 0x0000000A,
> + 0x0000000B,
> + }
> + })
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (IQST (PRQ3))
> + }
> +
> + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
> + {
> + Or (PRQ3, 0x80, PRQ3)
> + }
> +
> + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource
> Settings
> + {
> + Return (IQCR (PRQ3))
> + }
> +
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + CreateDWordField (Arg0, 0x05, PRRI)
> + Store (PRRI, PRQ3)
> + }
> + }
> +
> + Device (LNKS)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, 0x04) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000009,
> + }
> + })
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (0x0B)
> + }
> +
> + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
> + {
> + }
> +
> + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource
> Settings
> + {
> + Return (_PRS)
> + }
> +
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + }
> + }
> + }
> +
> + Scope (_SB)
> + {
> + Method (CPMA, 1, NotSerialized)
> + {
> + Store (DerefOf (Index (CPON, Arg0)), Local0)
> + Store (Buffer (0x08)
> + {
> + 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> + }, Local1)
> + Store (Arg0, Index (Local1, 0x02))
> + Store (Arg0, Index (Local1, 0x03))
> + Store (Local0, Index (Local1, 0x04))
> + Return (Local1)
> + }
> +
> + Method (CPST, 1, NotSerialized)
> + {
> + Store (DerefOf (Index (CPON, Arg0)), Local0)
> + If (Local0)
> + {
> + Return (0x0F)
> + }
> + Else
> + {
> + Return (Zero)
> + }
> + }
> +
> + Method (CPEJ, 2, NotSerialized)
> + {
> + Sleep (0xC8)
> + }
> +
> + OperationRegion (PRST, SystemIO, 0xAF00, 0x20)
> + Field (PRST, ByteAcc, NoLock, Preserve)
> + {
> + PRS, 256
> + }
> +
> + Method (PRSC, 0, NotSerialized)
> + {
> + Store (PRS, Local5)
> + Store (Zero, Local2)
> + Store (Zero, Local0)
> + While (LLess (Local0, SizeOf (CPON)))
> + {
> + Store (DerefOf (Index (CPON, Local0)), Local1)
> + If (And (Local0, 0x07))
> + {
> + ShiftRight (Local2, One, Local2)
> + }
> + Else
> + {
> + Store (DerefOf (Index (Local5, ShiftRight (Local0,
> 0x03))), Local2)
> + }
> +
> + Store (And (Local2, One), Local3)
> + If (LNotEqual (Local1, Local3))
> + {
> + Store (Local3, Index (CPON, Local0))
> + If (LEqual (Local3, One))
> + {
> + NTFY (Local0, One)
> + }
> + Else
> + {
> + NTFY (Local0, 0x03)
> + }
> + }
> +
> + Increment (Local0)
> + }
> + }
> + }
> +
> + Scope (_GPE)
> + {
> + Name (_HID, "ACPI0006") // _HID: Hardware ID
> + Method (_L00, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE
> + {
> + \_SB.PCI0.PCNF ()
> + }
> +
> + Method (_E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE
> + {
> + \_SB.PRSC ()
> + }
> +
> + Method (_L03, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L04, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L05, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L06, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L07, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L08, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L0A, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L0B, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L0C, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L0D, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L0E, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L0F, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> + }
> +}
> +
> diff --git a/tests/acpi-test-data/pc/FACP.dsl
> b/tests/acpi-test-data/pc/FACP.dsl
> new file mode 100644
> index 0000000..b48117d
> --- /dev/null
> +++ b/tests/acpi-test-data/pc/FACP.dsl
> @@ -0,0 +1,99 @@
> +/*
> + * Intel ACPI Component Architecture
> + * AML Disassembler version 20130823-64 [Oct 5 2013]
> + * Copyright (c) 2000 - 2013 Intel Corporation
> + *
> + * Disassembly of FACP, Thu Nov 14 15:25:31 2013
> + *
> + * ACPI Data Table [FACP]
> + *
> + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
> + */
> +
> +[000h 0000 4] Signature : "FACP" [Fixed ACPI
> Description Table (FADT)]
> +[004h 0004 4] Table Length : 00000074
> +[008h 0008 1] Revision : 01
> +[009h 0009 1] Checksum : D9
> +[00Ah 0010 6] Oem ID : "BOCHS "
> +[010h 0016 8] Oem Table ID : "BXPCFACP"
> +[018h 0024 4] Oem Revision : 00000001
> +[01Ch 0028 4] Asl Compiler ID : "BXPC"
> +[020h 0032 4] Asl Compiler Revision : 00000001
> +
> +[024h 0036 4] FACS Address : 7FFFE000
> +[028h 0040 4] DSDT Address : 7FFFE040
> +[02Ch 0044 1] Model : 01
> +[02Dh 0045 1] PM Profile : 00 [Unspecified]
> +[02Eh 0046 2] SCI Interrupt : 0009
> +[030h 0048 4] SMI Command Port : 000000B2
> +[034h 0052 1] ACPI Enable Value : F1
> +[035h 0053 1] ACPI Disable Value : F0
> +[036h 0054 1] S4BIOS Command : 00
> +[037h 0055 1] P-State Control : 00
> +[038h 0056 4] PM1A Event Block Address : 0000B000
> +[03Ch 0060 4] PM1B Event Block Address : 00000000
> +[040h 0064 4] PM1A Control Block Address : 0000B004
> +[044h 0068 4] PM1B Control Block Address : 00000000
> +[048h 0072 4] PM2 Control Block Address : 00000000
> +[04Ch 0076 4] PM Timer Block Address : 0000B008
> +[050h 0080 4] GPE0 Block Address : 0000AFE0
> +[054h 0084 4] GPE1 Block Address : 00000000
> +[058h 0088 1] PM1 Event Block Length : 04
> +[059h 0089 1] PM1 Control Block Length : 02
> +[05Ah 0090 1] PM2 Control Block Length : 00
> +[05Bh 0091 1] PM Timer Block Length : 04
> +[05Ch 0092 1] GPE0 Block Length : 04
> +[05Dh 0093 1] GPE1 Block Length : 00
> +[05Eh 0094 1] GPE1 Base Offset : 00
> +[05Fh 0095 1] _CST Support : 00
> +[060h 0096 2] C2 Latency : 0FFF
> +[062h 0098 2] C3 Latency : 0FFF
> +[064h 0100 2] CPU Cache Size : 0000
> +[066h 0102 2] Cache Flush Stride : 0000
> +[068h 0104 1] Duty Cycle Offset : 00
> +[069h 0105 1] Duty Cycle Width : 00
> +[06Ah 0106 1] RTC Day Alarm Index : 00
> +[06Bh 0107 1] RTC Month Alarm Index : 00
> +[06Ch 0108 1] RTC Century Index : 00
> +[06Dh 0109 2] Boot Flags (decoded below) : 0000
> + Legacy Devices Supported (V2) : 0
> + 8042 Present on ports 60/64 (V2) : 0
> + VGA Not Present (V4) : 0
> + MSI Not Supported (V4) : 0
> + PCIe ASPM Not Supported (V4) : 0
> + CMOS RTC Not Present (V5) : 0
> +[06Fh 0111 1] Reserved : 00
> +[070h 0112 4] Flags (decoded below) : 000080A5
> + WBINVD instruction is operational (V1) : 1
> + WBINVD flushes all caches (V1) : 0
> + All CPUs support C1 (V1) : 1
> + C2 works on MP system (V1) : 0
> + Control Method Power Button (V1) : 0
> + Control Method Sleep Button (V1) : 1
> + RTC wake not in fixed reg space (V1) : 0
> + RTC can wake system from S4 (V1) : 1
> + 32-bit PM Timer (V1) : 0
> + Docking Supported (V1) : 0
> + Reset Register Supported (V2) : 0
> + Sealed Case (V3) : 0
> + Headless - No Video (V3) : 0
> + Use native instr after SLP_TYPx (V3) : 0
> + PCIEXP_WAK Bits Supported (V4) : 0
> + Use Platform Timer (V4) : 1
> + RTC_STS valid on S4 wake (V4) : 0
> + Remote Power-on capable (V4) : 0
> + Use APIC Cluster Model (V4) : 0
> + Use APIC Physical Destination Mode (V4) : 0
> + Hardware Reduced (V5) : 0
> + Low Power S0 Idle (V5) : 0
> +
> +Raw Table Data: Length 116 (0x74)
> +
> + 0000: 46 41 43 50 74 00 00 00 01 D9 42 4F 43 48 53 20 FACPt.....BOCHS
> + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 BXPCFACP....BXPC
> + 0020: 01 00 00 00 00 E0 FF 7F 40 E0 FF 7F 01 00 09 00 address@hidden
> + 0030: B2 00 00 00 F1 F0 00 00 00 B0 00 00 00 00 00 00 ................
> + 0040: 04 B0 00 00 00 00 00 00 00 00 00 00 08 B0 00 00 ................
> + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 ................
> + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 00 00 00 00 ................
> + 0070: A5 80 00 00 ....
> diff --git a/tests/acpi-test-data/pc/FACS.dsl
> b/tests/acpi-test-data/pc/FACS.dsl
> new file mode 100644
> index 0000000..e8f205f
> --- /dev/null
> +++ b/tests/acpi-test-data/pc/FACS.dsl
> @@ -0,0 +1,32 @@
> +/*
> + * Intel ACPI Component Architecture
> + * AML Disassembler version 20130823-64 [Oct 5 2013]
> + * Copyright (c) 2000 - 2013 Intel Corporation
> + *
> + * Disassembly of FACS, Thu Nov 14 15:25:31 2013
> + *
> + * ACPI Data Table [FACS]
> + *
> + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
> + */
> +
> +[000h 0000 4] Signature : "FACS"
> +[004h 0004 4] Length : 00000040
> +[008h 0008 4] Hardware Signature : 00000000
> +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000
> +[010h 0016 4] Global Lock : 00000000
> +[014h 0020 4] Flags (decoded below) : 00000000
> + S4BIOS Support Present : 0
> + 64-bit Wake Supported (V2) : 0
> +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000
> +[020h 0032 1] Version : 00
> +[021h 0033 3] Reserved : 000000
> +[024h 0036 4] OspmFlags (decoded below) : 00000000
> + 64-bit Wake Env Required (V2) : 0
> +
> +Raw Table Data: Length 64 (0x40)
> +
> + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 address@hidden
> + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
> + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
> + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
> diff --git a/tests/acpi-test-data/pc/HPET.dsl
> b/tests/acpi-test-data/pc/HPET.dsl
> new file mode 100644
> index 0000000..6098956
> --- /dev/null
> +++ b/tests/acpi-test-data/pc/HPET.dsl
> @@ -0,0 +1,43 @@
> +/*
> + * Intel ACPI Component Architecture
> + * AML Disassembler version 20130823-64 [Oct 5 2013]
> + * Copyright (c) 2000 - 2013 Intel Corporation
> + *
> + * Disassembly of HPET, Thu Nov 14 15:25:31 2013
> + *
> + * ACPI Data Table [HPET]
> + *
> + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
> + */
> +
> +[000h 0000 4] Signature : "HPET" [High Precision
> Event Timer table]
> +[004h 0004 4] Table Length : 00000038
> +[008h 0008 1] Revision : 01
> +[009h 0009 1] Checksum : 03
> +[00Ah 0010 6] Oem ID : "BOCHS "
> +[010h 0016 8] Oem Table ID : "BXPCHPET"
> +[018h 0024 4] Oem Revision : 00000001
> +[01Ch 0028 4] Asl Compiler ID : "BXPC"
> +[020h 0032 4] Asl Compiler Revision : 00000001
> +
> +[024h 0036 4] Hardware Block ID : 8086A201
> +
> +[028h 0040 12] Timer Block Register : [Generic Address Structure]
> +[028h 0040 1] Space ID : 00 [SystemMemory]
> +[029h 0041 1] Bit Width : 00
> +[02Ah 0042 1] Bit Offset : 00
> +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy]
> +[02Ch 0044 8] Address : 00000000FED00000
> +
> +[034h 0052 1] Sequence Number : 00
> +[035h 0053 2] Minimum Clock Ticks : 0000
> +[037h 0055 1] Flags (decoded below) : 00
> + 4K Page Protect : 0
> + 64K Page Protect : 0
> +
> +Raw Table Data: Length 56 (0x38)
> +
> + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 HPET8.....BOCHS
> + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 BXPCHPET....BXPC
> + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE ................
> + 0030: 00 00 00 00 00 00 00 00 ........
> diff --git a/tests/acpi-test-data/pc/SSDT.dsl
> b/tests/acpi-test-data/pc/SSDT.dsl
> new file mode 100644
> index 0000000..309acc8
> --- /dev/null
> +++ b/tests/acpi-test-data/pc/SSDT.dsl
> @@ -0,0 +1,634 @@
> +/*
> + * Intel ACPI Component Architecture
> + * AML Disassembler version 20130823-64 [Oct 8 2013]
> + * Copyright (c) 2000 - 2013 Intel Corporation
> + *
> + * Disassembly of SSDT, Wed Nov 20 09:17:48 2013
> + *
> + * Original Table Header:
> + * Signature "SSDT"
> + * Length 0x00000838 (2104)
> + * Revision 0x01
> + * Checksum 0x01
> + * OEM ID "BOCHS "
> + * OEM Table ID "BXPCSSDT"
> + * OEM Revision 0x00000001 (1)
> + * Compiler ID "BXPC"
> + * Compiler Version 0x00000001 (1)
> + */
> +DefinitionBlock ("SSDT.aml", "SSDT", 1, "BOCHS ", "BXPCSSDT", 0x00000001)
> +{
> +
> + External (_SB_.PCI0.ISA_, DeviceObj)
> + External (CPEJ, MethodObj) // 2 Arguments
> + External (CPMA, MethodObj) // 1 Arguments
> + External (CPST, MethodObj) // 1 Arguments
> + External (PCEJ, MethodObj) // 1 Arguments
> + External (PCI0, DeviceObj)
> +
> + Scope (\)
> + {
> + Name (P0S, 0x80000000)
> + Name (P0E, 0xFEBFFFFF)
> + Name (P1V, 0x00)
> + Name (P1S, Buffer (0x08)
> + {
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> + })
> + Name (P1E, Buffer (0x08)
> + {
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> + })
> + Name (P1L, Buffer (0x08)
> + {
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> + })
> + }
> +
> + Scope (\)
> + {
> + Name (_S3, Package (0x04) // _S3_: S3 System State
> + {
> + One,
> + One,
> + Zero,
> + Zero
> + })
> + Name (_S4, Package (0x04) // _S4_: S4 System State
> + {
> + 0x02,
> + 0x02,
> + Zero,
> + Zero
> + })
> + Name (_S5, Package (0x04) // _S5_: S5 System State
> + {
> + Zero,
> + Zero,
> + Zero,
> + Zero
> + })
> + }
> +
> + Scope (\_SB.PCI0.ISA)
> + {
> + Device (PEVT)
> + {
> + Name (_HID, "QEMU0001") // _HID: Hardware ID
> + Name (PEST, 0x0000)
> + OperationRegion (PEOR, SystemIO, PEST, One)
> + Field (PEOR, ByteAcc, NoLock, Preserve)
> + {
> + PEPT, 8
> + }
> +
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Store (PEST, Local0)
> + If (LEqual (Local0, Zero))
> + {
> + Return (Zero)
> + }
> + Else
> + {
> + Return (0x0F)
> + }
> + }
> +
> + Method (RDPT, 0, NotSerialized)
> + {
> + Store (PEPT, Local0)
> + Return (Local0)
> + }
> +
> + Method (WRPT, 1, NotSerialized)
> + {
> + Store (Arg0, PEPT)
> + }
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + IO (Decode16,
> + 0x0000, // Range Minimum
> + 0x0000, // Range Maximum
> + 0x01, // Alignment
> + 0x01, // Length
> + _Y00)
> + })
> + CreateWordField (_CRS, \_SB.PCI0.ISA.PEVT._Y00._MIN, IOMN) //
> _MIN: Minimum Base Address
> + CreateWordField (_CRS, \_SB.PCI0.ISA.PEVT._Y00._MAX, IOMX) //
> _MAX: Maximum Base Address
> + Method (_INI, 0, NotSerialized) // _INI: Initialize
> + {
> + Store (PEST, IOMN)
> + Store (PEST, IOMX)
> + }
> + }
> + }
> +
> + Scope (_SB)
> + {
> + Processor (CP00, 0x00, 0x00000000, 0x00)
> + {
> + Name (ID, 0x00)
> + Name (_HID, "ACPI0007") // _HID: Hardware ID
> + Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table
> Entry
> + {
> + Return (CPMA (ID))
> + }
> +
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (CPST (ID))
> + }
> +
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + CPEJ (ID, Arg0)
> + }
> + }
> +
> + Method (NTFY, 2, NotSerialized)
> + {
> + If (LEqual (Arg0, 0x00))
> + {
> + Notify (CP00, Arg1)
> + }
> + }
> +
> + Name (CPON, Package (0x01)
> + {
> + One
> + })
> + Scope (PCI0)
> + {
> + Device (S01)
> + {
> + Name (_SUN, 0x01) // _SUN: Slot User Number
> + Name (_ADR, 0x00010000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S02)
> + {
> + Name (_SUN, 0x02) // _SUN: Slot User Number
> + Name (_ADR, 0x00020000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S03)
> + {
> + Name (_SUN, 0x03) // _SUN: Slot User Number
> + Name (_ADR, 0x00030000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S04)
> + {
> + Name (_SUN, 0x04) // _SUN: Slot User Number
> + Name (_ADR, 0x00040000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S05)
> + {
> + Name (_SUN, 0x05) // _SUN: Slot User Number
> + Name (_ADR, 0x00050000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S06)
> + {
> + Name (_SUN, 0x06) // _SUN: Slot User Number
> + Name (_ADR, 0x00060000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S07)
> + {
> + Name (_SUN, 0x07) // _SUN: Slot User Number
> + Name (_ADR, 0x00070000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S08)
> + {
> + Name (_SUN, 0x08) // _SUN: Slot User Number
> + Name (_ADR, 0x00080000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S09)
> + {
> + Name (_SUN, 0x09) // _SUN: Slot User Number
> + Name (_ADR, 0x00090000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S0A)
> + {
> + Name (_SUN, 0x0A) // _SUN: Slot User Number
> + Name (_ADR, 0x000A0000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S0B)
> + {
> + Name (_SUN, 0x0B) // _SUN: Slot User Number
> + Name (_ADR, 0x000B0000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S0C)
> + {
> + Name (_SUN, 0x0C) // _SUN: Slot User Number
> + Name (_ADR, 0x000C0000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S0D)
> + {
> + Name (_SUN, 0x0D) // _SUN: Slot User Number
> + Name (_ADR, 0x000D0000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S0E)
> + {
> + Name (_SUN, 0x0E) // _SUN: Slot User Number
> + Name (_ADR, 0x000E0000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S0F)
> + {
> + Name (_SUN, 0x0F) // _SUN: Slot User Number
> + Name (_ADR, 0x000F0000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S10)
> + {
> + Name (_SUN, 0x10) // _SUN: Slot User Number
> + Name (_ADR, 0x00100000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S11)
> + {
> + Name (_SUN, 0x11) // _SUN: Slot User Number
> + Name (_ADR, 0x00110000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S12)
> + {
> + Name (_SUN, 0x12) // _SUN: Slot User Number
> + Name (_ADR, 0x00120000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S13)
> + {
> + Name (_SUN, 0x13) // _SUN: Slot User Number
> + Name (_ADR, 0x00130000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S14)
> + {
> + Name (_SUN, 0x14) // _SUN: Slot User Number
> + Name (_ADR, 0x00140000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S15)
> + {
> + Name (_SUN, 0x15) // _SUN: Slot User Number
> + Name (_ADR, 0x00150000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S16)
> + {
> + Name (_SUN, 0x16) // _SUN: Slot User Number
> + Name (_ADR, 0x00160000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S17)
> + {
> + Name (_SUN, 0x17) // _SUN: Slot User Number
> + Name (_ADR, 0x00170000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S18)
> + {
> + Name (_SUN, 0x18) // _SUN: Slot User Number
> + Name (_ADR, 0x00180000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S19)
> + {
> + Name (_SUN, 0x19) // _SUN: Slot User Number
> + Name (_ADR, 0x00190000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S1A)
> + {
> + Name (_SUN, 0x1A) // _SUN: Slot User Number
> + Name (_ADR, 0x001A0000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S1B)
> + {
> + Name (_SUN, 0x1B) // _SUN: Slot User Number
> + Name (_ADR, 0x001B0000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S1C)
> + {
> + Name (_SUN, 0x1C) // _SUN: Slot User Number
> + Name (_ADR, 0x001C0000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S1D)
> + {
> + Name (_SUN, 0x1D) // _SUN: Slot User Number
> + Name (_ADR, 0x001D0000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S1E)
> + {
> + Name (_SUN, 0x1E) // _SUN: Slot User Number
> + Name (_ADR, 0x001E0000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Device (S1F)
> + {
> + Name (_SUN, 0x1F) // _SUN: Slot User Number
> + Name (_ADR, 0x001F0000) // _ADR: Address
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + Return (PCEJ (_SUN))
> + }
> + }
> +
> + Method (PCNT, 2, NotSerialized)
> + {
> + If (LEqual (Arg0, 0x01))
> + {
> + Notify (S01, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x02))
> + {
> + Notify (S02, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x03))
> + {
> + Notify (S03, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x04))
> + {
> + Notify (S04, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x05))
> + {
> + Notify (S05, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x06))
> + {
> + Notify (S06, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x07))
> + {
> + Notify (S07, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x08))
> + {
> + Notify (S08, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x09))
> + {
> + Notify (S09, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x0A))
> + {
> + Notify (S0A, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x0B))
> + {
> + Notify (S0B, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x0C))
> + {
> + Notify (S0C, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x0D))
> + {
> + Notify (S0D, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x0E))
> + {
> + Notify (S0E, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x0F))
> + {
> + Notify (S0F, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x10))
> + {
> + Notify (S10, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x11))
> + {
> + Notify (S11, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x12))
> + {
> + Notify (S12, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x13))
> + {
> + Notify (S13, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x14))
> + {
> + Notify (S14, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x15))
> + {
> + Notify (S15, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x16))
> + {
> + Notify (S16, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x17))
> + {
> + Notify (S17, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x18))
> + {
> + Notify (S18, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x19))
> + {
> + Notify (S19, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x1A))
> + {
> + Notify (S1A, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x1B))
> + {
> + Notify (S1B, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x1C))
> + {
> + Notify (S1C, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x1D))
> + {
> + Notify (S1D, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x1E))
> + {
> + Notify (S1E, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x1F))
> + {
> + Notify (S1F, Arg1)
> + }
> + }
> + }
> + }
> +}
> +
> diff --git a/tests/acpi-test-data/q35/APIC.dsl
> b/tests/acpi-test-data/q35/APIC.dsl
> new file mode 100644
> index 0000000..2c08ef1
> --- /dev/null
> +++ b/tests/acpi-test-data/q35/APIC.dsl
> @@ -0,0 +1,103 @@
> +/*
> + * Intel ACPI Component Architecture
> + * AML Disassembler version 20130823-64 [Oct 8 2013]
> + * Copyright (c) 2000 - 2013 Intel Corporation
> + *
> + * Disassembly of APIC, Thu Nov 21 04:48:06 2013
> + *
> + * ACPI Data Table [APIC]
> + *
> + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
> + */
> +
> +[000h 0000 4] Signature : "APIC" [Multiple APIC
> Description Table (MADT)]
> +[004h 0004 4] Table Length : 00000078
> +[008h 0008 1] Revision : 01
> +[009h 0009 1] Checksum : ED
> +[00Ah 0010 6] Oem ID : "BOCHS "
> +[010h 0016 8] Oem Table ID : "BXPCAPIC"
> +[018h 0024 4] Oem Revision : 00000001
> +[01Ch 0028 4] Asl Compiler ID : "BXPC"
> +[020h 0032 4] Asl Compiler Revision : 00000001
> +
> +[024h 0036 4] Local Apic Address : FEE00000
> +[028h 0040 4] Flags (decoded below) : 00000001
> + PC-AT Compatibility : 1
> +
> +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
> +[02Dh 0045 1] Length : 08
> +[02Eh 0046 1] Processor ID : 00
> +[02Fh 0047 1] Local Apic ID : 00
> +[030h 0048 4] Flags (decoded below) : 00000001
> + Processor Enabled : 1
> +
> +[034h 0052 1] Subtable Type : 01 [I/O APIC]
> +[035h 0053 1] Length : 0C
> +[036h 0054 1] I/O Apic ID : 00
> +[037h 0055 1] Reserved : 00
> +[038h 0056 4] Address : FEC00000
> +[03Ch 0060 4] Interrupt : 00000000
> +
> +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override]
> +[041h 0065 1] Length : 0A
> +[042h 0066 1] Bus : 00
> +[043h 0067 1] Source : 00
> +[044h 0068 4] Interrupt : 00000002
> +[048h 0072 2] Flags (decoded below) : 0000
> + Polarity : 0
> + Trigger Mode : 0
> +
> +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override]
> +[04Bh 0075 1] Length : 0A
> +[04Ch 0076 1] Bus : 00
> +[04Dh 0077 1] Source : 05
> +[04Eh 0078 4] Interrupt : 00000005
> +[052h 0082 2] Flags (decoded below) : 000D
> + Polarity : 1
> + Trigger Mode : 3
> +
> +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override]
> +[055h 0085 1] Length : 0A
> +[056h 0086 1] Bus : 00
> +[057h 0087 1] Source : 09
> +[058h 0088 4] Interrupt : 00000009
> +[05Ch 0092 2] Flags (decoded below) : 000D
> + Polarity : 1
> + Trigger Mode : 3
> +
> +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override]
> +[05Fh 0095 1] Length : 0A
> +[060h 0096 1] Bus : 00
> +[061h 0097 1] Source : 0A
> +[062h 0098 4] Interrupt : 0000000A
> +[066h 0102 2] Flags (decoded below) : 000D
> + Polarity : 1
> + Trigger Mode : 3
> +
> +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override]
> +[069h 0105 1] Length : 0A
> +[06Ah 0106 1] Bus : 00
> +[06Bh 0107 1] Source : 0B
> +[06Ch 0108 4] Interrupt : 0000000B
> +[070h 0112 2] Flags (decoded below) : 000D
> + Polarity : 1
> + Trigger Mode : 3
> +
> +[072h 0114 1] Subtable Type : 04 [Local APIC NMI]
> +[073h 0115 1] Length : 06
> +[074h 0116 1] Processor ID : FF
> +[075h 0117 2] Flags (decoded below) : 0000
> + Polarity : 0
> + Trigger Mode : 0
> +[077h 0119 1] Interrupt Input LINT : 01
> +
> +Raw Table Data: Length 120 (0x78)
> +
> + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 APICx.....BOCHS
> + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 BXPCAPIC....BXPC
> + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 ................
> + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 ................
> + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 ................
> + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A ................
> + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 ................
> + 0070: 0D 00 04 06 FF 00 00 01 ........
> diff --git a/tests/acpi-test-data/q35/DSDT.dsl
> b/tests/acpi-test-data/q35/DSDT.dsl
> new file mode 100644
> index 0000000..88b20b3
> --- /dev/null
> +++ b/tests/acpi-test-data/q35/DSDT.dsl
> @@ -0,0 +1,3197 @@
> +/*
> + * Intel ACPI Component Architecture
> + * AML Disassembler version 20130823-64 [Oct 8 2013]
> + * Copyright (c) 2000 - 2013 Intel Corporation
> + *
> + * Disassembly of DSDT, Thu Nov 21 04:48:06 2013
> + *
> + * Original Table Header:
> + * Signature "DSDT"
> + * Length 0x00001CB0 (7344)
> + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support
> + * Checksum 0x71
> + * OEM ID "BOCHS "
> + * OEM Table ID "BXPCDSDT"
> + * OEM Revision 0x00000001 (1)
> + * Compiler ID "BXPC"
> + * Compiler Version 0x00000001 (1)
> + */
> +DefinitionBlock ("DSDT.aml", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
> +{
> +
> + External (CPON, PkgObj)
> + External (NTFY, MethodObj) // 2 Arguments
> + External (P0E_, IntObj)
> + External (P0S_, IntObj)
> + External (P1E_, BuffObj)
> + External (P1L_, BuffObj)
> + External (P1S_, BuffObj)
> + External (P1V_, IntObj)
> +
> + Scope (\)
> + {
> + OperationRegion (DBG, SystemIO, 0x0402, One)
> + Field (DBG, ByteAcc, NoLock, Preserve)
> + {
> + DBGB, 8
> + }
> +
> + Method (DBUG, 1, NotSerialized)
> + {
> + ToHexString (Arg0, Local0)
> + ToBuffer (Local0, Local0)
> + Subtract (SizeOf (Local0), One, Local1)
> + Store (Zero, Local2)
> + While (LLess (Local2, Local1))
> + {
> + Store (DerefOf (Index (Local0, Local2)), DBGB)
> + Increment (Local2)
> + }
> +
> + Store (0x0A, DBGB)
> + }
> + }
> +
> + Scope (_SB)
> + {
> + OperationRegion (PCST, SystemIO, 0xAE00, 0x0C)
> + OperationRegion (PCSB, SystemIO, 0xAE0C, One)
> + Field (PCSB, AnyAcc, NoLock, WriteAsZeros)
> + {
> + PCIB, 8
> + }
> + }
> +
> + Scope (_SB)
> + {
> + Device (PCI0)
> + {
> + Name (_HID, EisaId ("PNP0A08")) // _HID: Hardware ID
> + Name (_CID, EisaId ("PNP0A03")) // _CID: Compatible ID
> + Name (_ADR, Zero) // _ADR: Address
> + Name (_UID, One) // _UID: Unique ID
> + Name (SUPP, Zero)
> + Name (CTRL, Zero)
> + Method (_OSC, 4, NotSerialized) // _OSC: Operating System
> Capabilities
> + {
> + CreateDWordField (Arg3, Zero, CDW1)
> + If (LEqual (Arg0, Buffer (0x10)
> + {
> + /* 0000 */ 0x5B, 0x4D, 0xDB, 0x33, 0xF7, 0x1F,
> 0x1C, 0x40,
> + /* 0008 */ 0x96, 0x57, 0x74, 0x41, 0xC0, 0x3D,
> 0xD7, 0x66
> + }))
> + {
> + CreateDWordField (Arg3, 0x04, CDW2)
> + CreateDWordField (Arg3, 0x08, CDW3)
> + Store (CDW2, SUPP)
> + Store (CDW3, CTRL)
> + And (CTRL, 0x1D, CTRL)
> + If (LNotEqual (Arg1, One))
> + {
> + Or (CDW1, 0x08, CDW1)
> + }
> +
> + If (LNotEqual (CDW3, CTRL))
> + {
> + Or (CDW1, 0x10, CDW1)
> + }
> +
> + Store (CTRL, CDW3)
> + }
> + Else
> + {
> + Or (CDW1, 0x04, CDW1)
> + }
> +
> + Return (Arg3)
> + }
> + }
> + }
> +
> + Scope (_SB.PCI0)
> + {
> + Name (CRES, ResourceTemplate ()
> + {
> + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
> + 0x0000, // Granularity
> + 0x0000, // Range Minimum
> + 0x00FF, // Range Maximum
> + 0x0000, // Translation Offset
> + 0x0100, // Length
> + ,, )
> + IO (Decode16,
> + 0x0CF8, // Range Minimum
> + 0x0CF8, // Range Maximum
> + 0x01, // Alignment
> + 0x08, // Length
> + )
> + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode,
> EntireRange,
> + 0x0000, // Granularity
> + 0x0000, // Range Minimum
> + 0x0CF7, // Range Maximum
> + 0x0000, // Translation Offset
> + 0x0CF8, // Length
> + ,, , TypeStatic)
> + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode,
> EntireRange,
> + 0x0000, // Granularity
> + 0x0D00, // Range Minimum
> + 0xFFFF, // Range Maximum
> + 0x0000, // Translation Offset
> + 0xF300, // Length
> + ,, , TypeStatic)
> + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
> Cacheable, ReadWrite,
> + 0x00000000, // Granularity
> + 0x000A0000, // Range Minimum
> + 0x000BFFFF, // Range Maximum
> + 0x00000000, // Translation Offset
> + 0x00020000, // Length
> + ,, , AddressRangeMemory, TypeStatic)
> + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
> NonCacheable, ReadWrite,
> + 0x00000000, // Granularity
> + 0xE0000000, // Range Minimum
> + 0xFEBFFFFF, // Range Maximum
> + 0x00000000, // Translation Offset
> + 0x1EC00000, // Length
> + ,, _Y00, AddressRangeMemory, TypeStatic)
> + })
> + Name (CR64, ResourceTemplate ()
> + {
> + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
> Cacheable, ReadWrite,
> + 0x0000000000000000, // Granularity
> + 0x0000008000000000, // Range Minimum
> + 0x000000FFFFFFFFFF, // Range Maximum
> + 0x0000000000000000, // Translation Offset
> + 0x0000008000000000, // Length
> + ,, _Y01, AddressRangeMemory, TypeStatic)
> + })
> + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
> + {
> + CreateDWordField (CRES, \_SB.PCI0._Y00._MIN, PS32) // _MIN:
> Minimum Base Address
> + CreateDWordField (CRES, \_SB.PCI0._Y00._MAX, PE32) // _MAX:
> Maximum Base Address
> + CreateDWordField (CRES, \_SB.PCI0._Y00._LEN, PL32) // _LEN:
> Length
> + Store (P0S, PS32)
> + Store (P0E, PE32)
> + Store (Add (Subtract (P0E, P0S), One), PL32)
> + If (LEqual (P1V, Zero))
> + {
> + Return (CRES)
> + }
> +
> + CreateQWordField (CR64, \_SB.PCI0._Y01._MIN, PS64) // _MIN:
> Minimum Base Address
> + CreateQWordField (CR64, \_SB.PCI0._Y01._MAX, PE64) // _MAX:
> Maximum Base Address
> + CreateQWordField (CR64, \_SB.PCI0._Y01._LEN, PL64) // _LEN:
> Length
> + Store (P1S, PS64)
> + Store (P1E, PE64)
> + Store (P1L, PL64)
> + ConcatenateResTemplate (CRES, CR64, Local0)
> + Return (Local0)
> + }
> + }
> +
> + Scope (_SB)
> + {
> + Device (HPET)
> + {
> + Name (_HID, EisaId ("PNP0103")) // _HID: Hardware ID
> + Name (_UID, Zero) // _UID: Unique ID
> + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400)
> + Field (HPTM, DWordAcc, Lock, Preserve)
> + {
> + VEND, 32,
> + PRD, 32
> + }
> +
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Store (VEND, Local0)
> + Store (PRD, Local1)
> + ShiftRight (Local0, 0x10, Local0)
> + If (LOr (LEqual (Local0, Zero), LEqual (Local0, 0xFFFF)))
> + {
> + Return (Zero)
> + }
> +
> + If (LOr (LEqual (Local1, Zero), LGreater (Local1,
> 0x05F5E100)))
> + {
> + Return (Zero)
> + }
> +
> + Return (0x0F)
> + }
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + Memory32Fixed (ReadOnly,
> + 0xFED00000, // Address Base
> + 0x00000400, // Address Length
> + )
> + })
> + }
> + }
> +
> + Scope (_SB.PCI0)
> + {
> + Device (VGA)
> + {
> + Name (_ADR, 0x00010000) // _ADR: Address
> + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State
> + {
> + Return (Zero)
> + }
> +
> + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State
> + {
> + Return (Zero)
> + }
> +
> + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
> + {
> + Return (Zero)
> + }
> + }
> + }
> +
> + Scope (_SB.PCI0)
> + {
> + Device (ISA)
> + {
> + Name (_ADR, 0x001F0000) // _ADR: Address
> + OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C)
> + OperationRegion (LPCD, PCI_Config, 0x80, 0x02)
> + Field (LPCD, AnyAcc, NoLock, Preserve)
> + {
> + COMA, 3,
> + , 1,
> + COMB, 3,
> + Offset (0x01),
> + LPTD, 2,
> + , 2,
> + FDCD, 2
> + }
> +
> + OperationRegion (LPCE, PCI_Config, 0x82, 0x02)
> + Field (LPCE, AnyAcc, NoLock, Preserve)
> + {
> + CAEN, 1,
> + CBEN, 1,
> + LPEN, 1,
> + FDEN, 1
> + }
> + }
> + }
> +
> + Scope (_SB.PCI0.ISA)
> + {
> + Device (RTC)
> + {
> + Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + IO (Decode16,
> + 0x0070, // Range Minimum
> + 0x0070, // Range Maximum
> + 0x10, // Alignment
> + 0x02, // Length
> + )
> + IRQNoFlags ()
> + {8}
> + IO (Decode16,
> + 0x0072, // Range Minimum
> + 0x0072, // Range Maximum
> + 0x02, // Alignment
> + 0x06, // Length
> + )
> + })
> + }
> +
> + Device (KBD)
> + {
> + Name (_HID, EisaId ("PNP0303")) // _HID: Hardware ID
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (0x0F)
> + }
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + IO (Decode16,
> + 0x0060, // Range Minimum
> + 0x0060, // Range Maximum
> + 0x01, // Alignment
> + 0x01, // Length
> + )
> + IO (Decode16,
> + 0x0064, // Range Minimum
> + 0x0064, // Range Maximum
> + 0x01, // Alignment
> + 0x01, // Length
> + )
> + IRQNoFlags ()
> + {1}
> + })
> + }
> +
> + Device (MOU)
> + {
> + Name (_HID, EisaId ("PNP0F13")) // _HID: Hardware ID
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (0x0F)
> + }
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + IRQNoFlags ()
> + {12}
> + })
> + }
> +
> + Device (FDC0)
> + {
> + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Store (FDEN, Local0)
> + If (LEqual (Local0, Zero))
> + {
> + Return (Zero)
> + }
> + Else
> + {
> + Return (0x0F)
> + }
> + }
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + IO (Decode16,
> + 0x03F2, // Range Minimum
> + 0x03F2, // Range Maximum
> + 0x00, // Alignment
> + 0x04, // Length
> + )
> + IO (Decode16,
> + 0x03F7, // Range Minimum
> + 0x03F7, // Range Maximum
> + 0x00, // Alignment
> + 0x01, // Length
> + )
> + IRQNoFlags ()
> + {6}
> + DMA (Compatibility, NotBusMaster, Transfer8, )
> + {2}
> + })
> + }
> +
> + Device (LPT)
> + {
> + Name (_HID, EisaId ("PNP0400")) // _HID: Hardware ID
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Store (LPEN, Local0)
> + If (LEqual (Local0, Zero))
> + {
> + Return (Zero)
> + }
> + Else
> + {
> + Return (0x0F)
> + }
> + }
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + IO (Decode16,
> + 0x0378, // Range Minimum
> + 0x0378, // Range Maximum
> + 0x08, // Alignment
> + 0x08, // Length
> + )
> + IRQNoFlags ()
> + {7}
> + })
> + }
> +
> + Device (COM1)
> + {
> + Name (_HID, EisaId ("PNP0501")) // _HID: Hardware ID
> + Name (_UID, One) // _UID: Unique ID
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Store (CAEN, Local0)
> + If (LEqual (Local0, Zero))
> + {
> + Return (Zero)
> + }
> + Else
> + {
> + Return (0x0F)
> + }
> + }
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + IO (Decode16,
> + 0x03F8, // Range Minimum
> + 0x03F8, // Range Maximum
> + 0x00, // Alignment
> + 0x08, // Length
> + )
> + IRQNoFlags ()
> + {4}
> + })
> + }
> +
> + Device (COM2)
> + {
> + Name (_HID, EisaId ("PNP0501")) // _HID: Hardware ID
> + Name (_UID, 0x02) // _UID: Unique ID
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Store (CBEN, Local0)
> + If (LEqual (Local0, Zero))
> + {
> + Return (Zero)
> + }
> + Else
> + {
> + Return (0x0F)
> + }
> + }
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + IO (Decode16,
> + 0x02F8, // Range Minimum
> + 0x02F8, // Range Maximum
> + 0x00, // Alignment
> + 0x08, // Length
> + )
> + IRQNoFlags ()
> + {3}
> + })
> + }
> + }
> +
> + Name (PICF, Zero)
> + Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model
> + {
> + Store (Arg0, PICF)
> + }
> +
> + Scope (_SB)
> + {
> + Scope (PCI0)
> + {
> + Name (PRTP, Package (0x80)
> + {
> + Package (0x04)
> + {
> + 0xFFFF,
> + Zero,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0xFFFF,
> + One,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0xFFFF,
> + 0x02,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0xFFFF,
> + 0x03,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0001FFFF,
> + Zero,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0001FFFF,
> + One,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0001FFFF,
> + 0x02,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0001FFFF,
> + 0x03,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0002FFFF,
> + Zero,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0002FFFF,
> + One,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0002FFFF,
> + 0x02,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0002FFFF,
> + 0x03,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0003FFFF,
> + Zero,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0003FFFF,
> + One,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0003FFFF,
> + 0x02,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0003FFFF,
> + 0x03,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0004FFFF,
> + Zero,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0004FFFF,
> + One,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0004FFFF,
> + 0x02,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0004FFFF,
> + 0x03,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0005FFFF,
> + Zero,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0005FFFF,
> + One,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0005FFFF,
> + 0x02,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0005FFFF,
> + 0x03,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0006FFFF,
> + Zero,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0006FFFF,
> + One,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0006FFFF,
> + 0x02,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0006FFFF,
> + 0x03,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0007FFFF,
> + Zero,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0007FFFF,
> + One,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0007FFFF,
> + 0x02,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0007FFFF,
> + 0x03,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0008FFFF,
> + Zero,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0008FFFF,
> + One,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0008FFFF,
> + 0x02,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0008FFFF,
> + 0x03,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0009FFFF,
> + Zero,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0009FFFF,
> + One,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0009FFFF,
> + 0x02,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0009FFFF,
> + 0x03,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000AFFFF,
> + Zero,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000AFFFF,
> + One,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000AFFFF,
> + 0x02,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000AFFFF,
> + 0x03,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000BFFFF,
> + Zero,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000BFFFF,
> + One,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000BFFFF,
> + 0x02,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000BFFFF,
> + 0x03,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000CFFFF,
> + Zero,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000CFFFF,
> + One,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000CFFFF,
> + 0x02,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000CFFFF,
> + 0x03,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000DFFFF,
> + Zero,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000DFFFF,
> + One,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000DFFFF,
> + 0x02,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000DFFFF,
> + 0x03,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000EFFFF,
> + Zero,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000EFFFF,
> + One,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000EFFFF,
> + 0x02,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000EFFFF,
> + 0x03,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000FFFFF,
> + Zero,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000FFFFF,
> + One,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000FFFFF,
> + 0x02,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000FFFFF,
> + 0x03,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0010FFFF,
> + Zero,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0010FFFF,
> + One,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0010FFFF,
> + 0x02,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0010FFFF,
> + 0x03,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0011FFFF,
> + Zero,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0011FFFF,
> + One,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0011FFFF,
> + 0x02,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0011FFFF,
> + 0x03,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0012FFFF,
> + Zero,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0012FFFF,
> + One,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0012FFFF,
> + 0x02,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0012FFFF,
> + 0x03,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0013FFFF,
> + Zero,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0013FFFF,
> + One,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0013FFFF,
> + 0x02,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0013FFFF,
> + 0x03,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0014FFFF,
> + Zero,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0014FFFF,
> + One,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0014FFFF,
> + 0x02,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0014FFFF,
> + 0x03,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0015FFFF,
> + Zero,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0015FFFF,
> + One,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0015FFFF,
> + 0x02,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0015FFFF,
> + 0x03,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0016FFFF,
> + Zero,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0016FFFF,
> + One,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0016FFFF,
> + 0x02,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0016FFFF,
> + 0x03,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0017FFFF,
> + Zero,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0017FFFF,
> + One,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0017FFFF,
> + 0x02,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0017FFFF,
> + 0x03,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0018FFFF,
> + Zero,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0018FFFF,
> + One,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0018FFFF,
> + 0x02,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0018FFFF,
> + 0x03,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0019FFFF,
> + Zero,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0019FFFF,
> + One,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0019FFFF,
> + 0x02,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0019FFFF,
> + 0x03,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001AFFFF,
> + Zero,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001AFFFF,
> + One,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001AFFFF,
> + 0x02,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001AFFFF,
> + 0x03,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001BFFFF,
> + Zero,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001BFFFF,
> + One,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001BFFFF,
> + 0x02,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001BFFFF,
> + 0x03,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001CFFFF,
> + Zero,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001CFFFF,
> + One,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001CFFFF,
> + 0x02,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001CFFFF,
> + 0x03,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001DFFFF,
> + Zero,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001DFFFF,
> + One,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001DFFFF,
> + 0x02,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001DFFFF,
> + 0x03,
> + LNKD,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001EFFFF,
> + Zero,
> + LNKE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001EFFFF,
> + One,
> + LNKF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001EFFFF,
> + 0x02,
> + LNKG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001EFFFF,
> + 0x03,
> + LNKH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001FFFFF,
> + Zero,
> + LNKA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001FFFFF,
> + One,
> + LNKB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001FFFFF,
> + 0x02,
> + LNKC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001FFFFF,
> + 0x03,
> + LNKD,
> + Zero
> + }
> + })
> + Name (PRTA, Package (0x80)
> + {
> + Package (0x04)
> + {
> + 0xFFFF,
> + Zero,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0xFFFF,
> + One,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0xFFFF,
> + 0x02,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0xFFFF,
> + 0x03,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0001FFFF,
> + Zero,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0001FFFF,
> + One,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0001FFFF,
> + 0x02,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0001FFFF,
> + 0x03,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0002FFFF,
> + Zero,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0002FFFF,
> + One,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0002FFFF,
> + 0x02,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0002FFFF,
> + 0x03,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0003FFFF,
> + Zero,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0003FFFF,
> + One,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0003FFFF,
> + 0x02,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0003FFFF,
> + 0x03,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0004FFFF,
> + Zero,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0004FFFF,
> + One,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0004FFFF,
> + 0x02,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0004FFFF,
> + 0x03,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0005FFFF,
> + Zero,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0005FFFF,
> + One,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0005FFFF,
> + 0x02,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0005FFFF,
> + 0x03,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0006FFFF,
> + Zero,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0006FFFF,
> + One,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0006FFFF,
> + 0x02,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0006FFFF,
> + 0x03,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0007FFFF,
> + Zero,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0007FFFF,
> + One,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0007FFFF,
> + 0x02,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0007FFFF,
> + 0x03,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0008FFFF,
> + Zero,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0008FFFF,
> + One,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0008FFFF,
> + 0x02,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0008FFFF,
> + 0x03,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0009FFFF,
> + Zero,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0009FFFF,
> + One,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0009FFFF,
> + 0x02,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0009FFFF,
> + 0x03,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000AFFFF,
> + Zero,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000AFFFF,
> + One,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000AFFFF,
> + 0x02,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000AFFFF,
> + 0x03,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000BFFFF,
> + Zero,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000BFFFF,
> + One,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000BFFFF,
> + 0x02,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000BFFFF,
> + 0x03,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000CFFFF,
> + Zero,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000CFFFF,
> + One,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000CFFFF,
> + 0x02,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000CFFFF,
> + 0x03,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000DFFFF,
> + Zero,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000DFFFF,
> + One,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000DFFFF,
> + 0x02,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000DFFFF,
> + 0x03,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000EFFFF,
> + Zero,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000EFFFF,
> + One,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000EFFFF,
> + 0x02,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000EFFFF,
> + 0x03,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000FFFFF,
> + Zero,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000FFFFF,
> + One,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000FFFFF,
> + 0x02,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x000FFFFF,
> + 0x03,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0010FFFF,
> + Zero,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0010FFFF,
> + One,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0010FFFF,
> + 0x02,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0010FFFF,
> + 0x03,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0011FFFF,
> + Zero,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0011FFFF,
> + One,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0011FFFF,
> + 0x02,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0011FFFF,
> + 0x03,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0012FFFF,
> + Zero,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0012FFFF,
> + One,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0012FFFF,
> + 0x02,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0012FFFF,
> + 0x03,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0013FFFF,
> + Zero,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0013FFFF,
> + One,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0013FFFF,
> + 0x02,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0013FFFF,
> + 0x03,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0014FFFF,
> + Zero,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0014FFFF,
> + One,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0014FFFF,
> + 0x02,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0014FFFF,
> + 0x03,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0015FFFF,
> + Zero,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0015FFFF,
> + One,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0015FFFF,
> + 0x02,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0015FFFF,
> + 0x03,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0016FFFF,
> + Zero,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0016FFFF,
> + One,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0016FFFF,
> + 0x02,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0016FFFF,
> + 0x03,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0017FFFF,
> + Zero,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0017FFFF,
> + One,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0017FFFF,
> + 0x02,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0017FFFF,
> + 0x03,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0018FFFF,
> + Zero,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0018FFFF,
> + One,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0018FFFF,
> + 0x02,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0018FFFF,
> + 0x03,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0019FFFF,
> + Zero,
> + GSIA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0019FFFF,
> + One,
> + GSIB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0019FFFF,
> + 0x02,
> + GSIC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x0019FFFF,
> + 0x03,
> + GSID,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001AFFFF,
> + Zero,
> + GSIA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001AFFFF,
> + One,
> + GSIB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001AFFFF,
> + 0x02,
> + GSIC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001AFFFF,
> + 0x03,
> + GSID,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001BFFFF,
> + Zero,
> + GSIA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001BFFFF,
> + One,
> + GSIB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001BFFFF,
> + 0x02,
> + GSIC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001BFFFF,
> + 0x03,
> + GSID,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001CFFFF,
> + Zero,
> + GSIA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001CFFFF,
> + One,
> + GSIB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001CFFFF,
> + 0x02,
> + GSIC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001CFFFF,
> + 0x03,
> + GSID,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001DFFFF,
> + Zero,
> + GSIA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001DFFFF,
> + One,
> + GSIB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001DFFFF,
> + 0x02,
> + GSIC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001DFFFF,
> + 0x03,
> + GSID,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001EFFFF,
> + Zero,
> + GSIE,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001EFFFF,
> + One,
> + GSIF,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001EFFFF,
> + 0x02,
> + GSIG,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001EFFFF,
> + 0x03,
> + GSIH,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001FFFFF,
> + Zero,
> + GSIA,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001FFFFF,
> + One,
> + GSIB,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001FFFFF,
> + 0x02,
> + GSIC,
> + Zero
> + },
> +
> + Package (0x04)
> + {
> + 0x001FFFFF,
> + 0x03,
> + GSID,
> + Zero
> + }
> + })
> + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
> + {
> + If (LEqual (PICF, Zero))
> + {
> + Return (PRTP)
> + }
> + Else
> + {
> + Return (PRTA)
> + }
> + }
> + }
> +
> + Field (PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve)
> + {
> + PRQA, 8,
> + PRQB, 8,
> + PRQC, 8,
> + PRQD, 8,
> + Offset (0x08),
> + PRQE, 8,
> + PRQF, 8,
> + PRQG, 8,
> + PRQH, 8
> + }
> +
> + Method (IQST, 1, NotSerialized)
> + {
> + If (And (0x80, Arg0))
> + {
> + Return (0x09)
> + }
> +
> + Return (0x0B)
> + }
> +
> + Method (IQCR, 1, Serialized)
> + {
> + Name (PRR0, ResourceTemplate ()
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,,
> _Y02)
> + {
> + 0x00000000,
> + }
> + })
> + CreateDWordField (PRR0, \_SB.IQCR._Y02._INT, PRRI) // _INT:
> Interrupts
> + Store (And (Arg0, 0x0F), PRRI)
> + Return (PRR0)
> + }
> +
> + Device (LNKA)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, Zero) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000005,
> + 0x0000000A,
> + 0x0000000B,
> + }
> + })
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (IQST (PRQA))
> + }
> +
> + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
> + {
> + Or (PRQA, 0x80, PRQA)
> + }
> +
> + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource
> Settings
> + {
> + Return (IQCR (PRQA))
> + }
> +
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + CreateDWordField (Arg0, 0x05, PRRI)
> + Store (PRRI, PRQA)
> + }
> + }
> +
> + Device (LNKB)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, One) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000005,
> + 0x0000000A,
> + 0x0000000B,
> + }
> + })
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (IQST (PRQB))
> + }
> +
> + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
> + {
> + Or (PRQB, 0x80, PRQB)
> + }
> +
> + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource
> Settings
> + {
> + Return (IQCR (PRQB))
> + }
> +
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + CreateDWordField (Arg0, 0x05, PRRI)
> + Store (PRRI, PRQB)
> + }
> + }
> +
> + Device (LNKC)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, 0x02) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000005,
> + 0x0000000A,
> + 0x0000000B,
> + }
> + })
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (IQST (PRQC))
> + }
> +
> + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
> + {
> + Or (PRQC, 0x80, PRQC)
> + }
> +
> + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource
> Settings
> + {
> + Return (IQCR (PRQC))
> + }
> +
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + CreateDWordField (Arg0, 0x05, PRRI)
> + Store (PRRI, PRQC)
> + }
> + }
> +
> + Device (LNKD)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, 0x03) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000005,
> + 0x0000000A,
> + 0x0000000B,
> + }
> + })
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (IQST (PRQD))
> + }
> +
> + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
> + {
> + Or (PRQD, 0x80, PRQD)
> + }
> +
> + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource
> Settings
> + {
> + Return (IQCR (PRQD))
> + }
> +
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + CreateDWordField (Arg0, 0x05, PRRI)
> + Store (PRRI, PRQD)
> + }
> + }
> +
> + Device (LNKE)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, 0x04) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000005,
> + 0x0000000A,
> + 0x0000000B,
> + }
> + })
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (IQST (PRQE))
> + }
> +
> + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
> + {
> + Or (PRQE, 0x80, PRQE)
> + }
> +
> + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource
> Settings
> + {
> + Return (IQCR (PRQE))
> + }
> +
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + CreateDWordField (Arg0, 0x05, PRRI)
> + Store (PRRI, PRQE)
> + }
> + }
> +
> + Device (LNKF)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, 0x05) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000005,
> + 0x0000000A,
> + 0x0000000B,
> + }
> + })
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (IQST (PRQF))
> + }
> +
> + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
> + {
> + Or (PRQF, 0x80, PRQF)
> + }
> +
> + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource
> Settings
> + {
> + Return (IQCR (PRQF))
> + }
> +
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + CreateDWordField (Arg0, 0x05, PRRI)
> + Store (PRRI, PRQF)
> + }
> + }
> +
> + Device (LNKG)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, 0x06) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000005,
> + 0x0000000A,
> + 0x0000000B,
> + }
> + })
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (IQST (PRQG))
> + }
> +
> + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
> + {
> + Or (PRQG, 0x80, PRQG)
> + }
> +
> + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource
> Settings
> + {
> + Return (IQCR (PRQG))
> + }
> +
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + CreateDWordField (Arg0, 0x05, PRRI)
> + Store (PRRI, PRQG)
> + }
> + }
> +
> + Device (LNKH)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, 0x07) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000005,
> + 0x0000000A,
> + 0x0000000B,
> + }
> + })
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (IQST (PRQH))
> + }
> +
> + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
> + {
> + Or (PRQH, 0x80, PRQH)
> + }
> +
> + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource
> Settings
> + {
> + Return (IQCR (PRQH))
> + }
> +
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + CreateDWordField (Arg0, 0x05, PRRI)
> + Store (PRRI, PRQH)
> + }
> + }
> +
> + Device (GSIA)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, Zero) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000010,
> + }
> + })
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000010,
> + }
> + })
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + }
> + }
> +
> + Device (GSIB)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, Zero) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000011,
> + }
> + })
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000011,
> + }
> + })
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + }
> + }
> +
> + Device (GSIC)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, Zero) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000012,
> + }
> + })
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000012,
> + }
> + })
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + }
> + }
> +
> + Device (GSID)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, Zero) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000013,
> + }
> + })
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000013,
> + }
> + })
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + }
> + }
> +
> + Device (GSIE)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, Zero) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000014,
> + }
> + })
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000014,
> + }
> + })
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + }
> + }
> +
> + Device (GSIF)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, Zero) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000015,
> + }
> + })
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000015,
> + }
> + })
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + }
> + }
> +
> + Device (GSIG)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, Zero) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000016,
> + }
> + })
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000016,
> + }
> + })
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + }
> + }
> +
> + Device (GSIH)
> + {
> + Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID
> + Name (_UID, Zero) // _UID: Unique ID
> + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000017,
> + }
> + })
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )
> + {
> + 0x00000017,
> + }
> + })
> + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
> + {
> + }
> + }
> + }
> +
> + Scope (_SB)
> + {
> + Method (CPMA, 1, NotSerialized)
> + {
> + Store (DerefOf (Index (CPON, Arg0)), Local0)
> + Store (Buffer (0x08)
> + {
> + 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> + }, Local1)
> + Store (Arg0, Index (Local1, 0x02))
> + Store (Arg0, Index (Local1, 0x03))
> + Store (Local0, Index (Local1, 0x04))
> + Return (Local1)
> + }
> +
> + Method (CPST, 1, NotSerialized)
> + {
> + Store (DerefOf (Index (CPON, Arg0)), Local0)
> + If (Local0)
> + {
> + Return (0x0F)
> + }
> + Else
> + {
> + Return (Zero)
> + }
> + }
> +
> + Method (CPEJ, 2, NotSerialized)
> + {
> + Sleep (0xC8)
> + }
> +
> + OperationRegion (PRST, SystemIO, 0xAF00, 0x20)
> + Field (PRST, ByteAcc, NoLock, Preserve)
> + {
> + PRS, 256
> + }
> +
> + Method (PRSC, 0, NotSerialized)
> + {
> + Store (PRS, Local5)
> + Store (Zero, Local2)
> + Store (Zero, Local0)
> + While (LLess (Local0, SizeOf (CPON)))
> + {
> + Store (DerefOf (Index (CPON, Local0)), Local1)
> + If (And (Local0, 0x07))
> + {
> + ShiftRight (Local2, One, Local2)
> + }
> + Else
> + {
> + Store (DerefOf (Index (Local5, ShiftRight (Local0,
> 0x03))), Local2)
> + }
> +
> + Store (And (Local2, One), Local3)
> + If (LNotEqual (Local1, Local3))
> + {
> + Store (Local3, Index (CPON, Local0))
> + If (LEqual (Local3, One))
> + {
> + NTFY (Local0, One)
> + }
> + Else
> + {
> + NTFY (Local0, 0x03)
> + }
> + }
> +
> + Increment (Local0)
> + }
> + }
> + }
> +
> + Scope (_GPE)
> + {
> + Name (_HID, "ACPI0006") // _HID: Hardware ID
> + Method (_L00, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L01, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + \_SB.PRSC ()
> + }
> +
> + Method (_L02, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L03, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L04, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L05, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L06, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L07, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L08, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L0A, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L0B, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L0C, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L0D, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L0E, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> +
> + Method (_L0F, 0, NotSerialized) // _Lxx: Level-Triggered GPE
> + {
> + }
> + }
> +}
> +
> diff --git a/tests/acpi-test-data/q35/FACP.dsl
> b/tests/acpi-test-data/q35/FACP.dsl
> new file mode 100644
> index 0000000..b3caf16
> --- /dev/null
> +++ b/tests/acpi-test-data/q35/FACP.dsl
> @@ -0,0 +1,99 @@
> +/*
> + * Intel ACPI Component Architecture
> + * AML Disassembler version 20130823-64 [Oct 8 2013]
> + * Copyright (c) 2000 - 2013 Intel Corporation
> + *
> + * Disassembly of FACP, Thu Nov 21 04:48:06 2013
> + *
> + * ACPI Data Table [FACP]
> + *
> + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
> + */
> +
> +[000h 0000 4] Signature : "FACP" [Fixed ACPI
> Description Table (FADT)]
> +[004h 0004 4] Table Length : 00000074
> +[008h 0008 1] Revision : 01
> +[009h 0009 1] Checksum : 78
> +[00Ah 0010 6] Oem ID : "BOCHS "
> +[010h 0016 8] Oem Table ID : "BXPCFACP"
> +[018h 0024 4] Oem Revision : 00000001
> +[01Ch 0028 4] Asl Compiler ID : "BXPC"
> +[020h 0032 4] Asl Compiler Revision : 00000001
> +
> +[024h 0036 4] FACS Address : 07FFD000
> +[028h 0040 4] DSDT Address : 07FFD040
> +[02Ch 0044 1] Model : 01
> +[02Dh 0045 1] PM Profile : 00 [Unspecified]
> +[02Eh 0046 2] SCI Interrupt : 0009
> +[030h 0048 4] SMI Command Port : 000000B2
> +[034h 0052 1] ACPI Enable Value : 02
> +[035h 0053 1] ACPI Disable Value : 03
> +[036h 0054 1] S4BIOS Command : 00
> +[037h 0055 1] P-State Control : 00
> +[038h 0056 4] PM1A Event Block Address : 0000B000
> +[03Ch 0060 4] PM1B Event Block Address : 00000000
> +[040h 0064 4] PM1A Control Block Address : 0000B004
> +[044h 0068 4] PM1B Control Block Address : 00000000
> +[048h 0072 4] PM2 Control Block Address : 00000000
> +[04Ch 0076 4] PM Timer Block Address : 0000B008
> +[050h 0080 4] GPE0 Block Address : 0000B020
> +[054h 0084 4] GPE1 Block Address : 00000000
> +[058h 0088 1] PM1 Event Block Length : 04
> +[059h 0089 1] PM1 Control Block Length : 02
> +[05Ah 0090 1] PM2 Control Block Length : 00
> +[05Bh 0091 1] PM Timer Block Length : 04
> +[05Ch 0092 1] GPE0 Block Length : 10
> +[05Dh 0093 1] GPE1 Block Length : 00
> +[05Eh 0094 1] GPE1 Base Offset : 00
> +[05Fh 0095 1] _CST Support : 00
> +[060h 0096 2] C2 Latency : 0FFF
> +[062h 0098 2] C3 Latency : 0FFF
> +[064h 0100 2] CPU Cache Size : 0000
> +[066h 0102 2] Cache Flush Stride : 0000
> +[068h 0104 1] Duty Cycle Offset : 00
> +[069h 0105 1] Duty Cycle Width : 00
> +[06Ah 0106 1] RTC Day Alarm Index : 00
> +[06Bh 0107 1] RTC Month Alarm Index : 00
> +[06Ch 0108 1] RTC Century Index : 00
> +[06Dh 0109 2] Boot Flags (decoded below) : 0000
> + Legacy Devices Supported (V2) : 0
> + 8042 Present on ports 60/64 (V2) : 0
> + VGA Not Present (V4) : 0
> + MSI Not Supported (V4) : 0
> + PCIe ASPM Not Supported (V4) : 0
> + CMOS RTC Not Present (V5) : 0
> +[06Fh 0111 1] Reserved : 00
> +[070h 0112 4] Flags (decoded below) : 000080A5
> + WBINVD instruction is operational (V1) : 1
> + WBINVD flushes all caches (V1) : 0
> + All CPUs support C1 (V1) : 1
> + C2 works on MP system (V1) : 0
> + Control Method Power Button (V1) : 0
> + Control Method Sleep Button (V1) : 1
> + RTC wake not in fixed reg space (V1) : 0
> + RTC can wake system from S4 (V1) : 1
> + 32-bit PM Timer (V1) : 0
> + Docking Supported (V1) : 0
> + Reset Register Supported (V2) : 0
> + Sealed Case (V3) : 0
> + Headless - No Video (V3) : 0
> + Use native instr after SLP_TYPx (V3) : 0
> + PCIEXP_WAK Bits Supported (V4) : 0
> + Use Platform Timer (V4) : 1
> + RTC_STS valid on S4 wake (V4) : 0
> + Remote Power-on capable (V4) : 0
> + Use APIC Cluster Model (V4) : 0
> + Use APIC Physical Destination Mode (V4) : 0
> + Hardware Reduced (V5) : 0
> + Low Power S0 Idle (V5) : 0
> +
> +Raw Table Data: Length 116 (0x74)
> +
> + 0000: 46 41 43 50 74 00 00 00 01 78 42 4F 43 48 53 20 FACPt....xBOCHS
> + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 BXPCFACP....BXPC
> + 0020: 01 00 00 00 00 D0 FF 07 40 D0 FF 07 01 00 09 00 address@hidden
> + 0030: B2 00 00 00 02 03 00 00 00 B0 00 00 00 00 00 00 ................
> + 0040: 04 B0 00 00 00 00 00 00 00 00 00 00 08 B0 00 00 ................
> + 0050: 20 B0 00 00 00 00 00 00 04 02 00 04 10 00 00 00 ...............
> + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 00 00 00 00 ................
> + 0070: A5 80 00 00 ....
> diff --git a/tests/acpi-test-data/q35/FACS.dsl
> b/tests/acpi-test-data/q35/FACS.dsl
> new file mode 100644
> index 0000000..cbc6781
> --- /dev/null
> +++ b/tests/acpi-test-data/q35/FACS.dsl
> @@ -0,0 +1,32 @@
> +/*
> + * Intel ACPI Component Architecture
> + * AML Disassembler version 20130823-64 [Oct 8 2013]
> + * Copyright (c) 2000 - 2013 Intel Corporation
> + *
> + * Disassembly of FACS, Thu Nov 21 04:48:06 2013
> + *
> + * ACPI Data Table [FACS]
> + *
> + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
> + */
> +
> +[000h 0000 4] Signature : "FACS"
> +[004h 0004 4] Length : 00000040
> +[008h 0008 4] Hardware Signature : 00000000
> +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000
> +[010h 0016 4] Global Lock : 00000000
> +[014h 0020 4] Flags (decoded below) : 00000000
> + S4BIOS Support Present : 0
> + 64-bit Wake Supported (V2) : 0
> +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000
> +[020h 0032 1] Version : 00
> +[021h 0033 3] Reserved : 000000
> +[024h 0036 4] OspmFlags (decoded below) : 00000000
> + 64-bit Wake Env Required (V2) : 0
> +
> +Raw Table Data: Length 64 (0x40)
> +
> + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 address@hidden
> + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
> + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
> + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
> diff --git a/tests/acpi-test-data/q35/HPET.dsl
> b/tests/acpi-test-data/q35/HPET.dsl
> new file mode 100644
> index 0000000..a13d081
> --- /dev/null
> +++ b/tests/acpi-test-data/q35/HPET.dsl
> @@ -0,0 +1,43 @@
> +/*
> + * Intel ACPI Component Architecture
> + * AML Disassembler version 20130823-64 [Oct 8 2013]
> + * Copyright (c) 2000 - 2013 Intel Corporation
> + *
> + * Disassembly of HPET, Thu Nov 21 04:48:06 2013
> + *
> + * ACPI Data Table [HPET]
> + *
> + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
> + */
> +
> +[000h 0000 4] Signature : "HPET" [High Precision
> Event Timer table]
> +[004h 0004 4] Table Length : 00000038
> +[008h 0008 1] Revision : 01
> +[009h 0009 1] Checksum : 03
> +[00Ah 0010 6] Oem ID : "BOCHS "
> +[010h 0016 8] Oem Table ID : "BXPCHPET"
> +[018h 0024 4] Oem Revision : 00000001
> +[01Ch 0028 4] Asl Compiler ID : "BXPC"
> +[020h 0032 4] Asl Compiler Revision : 00000001
> +
> +[024h 0036 4] Hardware Block ID : 8086A201
> +
> +[028h 0040 12] Timer Block Register : [Generic Address Structure]
> +[028h 0040 1] Space ID : 00 [SystemMemory]
> +[029h 0041 1] Bit Width : 00
> +[02Ah 0042 1] Bit Offset : 00
> +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy]
> +[02Ch 0044 8] Address : 00000000FED00000
> +
> +[034h 0052 1] Sequence Number : 00
> +[035h 0053 2] Minimum Clock Ticks : 0000
> +[037h 0055 1] Flags (decoded below) : 00
> + 4K Page Protect : 0
> + 64K Page Protect : 0
> +
> +Raw Table Data: Length 56 (0x38)
> +
> + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 HPET8.....BOCHS
> + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 BXPCHPET....BXPC
> + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE ................
> + 0030: 00 00 00 00 00 00 00 00 ........
> diff --git a/tests/acpi-test-data/q35/MCFG.dsl
> b/tests/acpi-test-data/q35/MCFG.dsl
> new file mode 100644
> index 0000000..073d559
> --- /dev/null
> +++ b/tests/acpi-test-data/q35/MCFG.dsl
> @@ -0,0 +1,36 @@
> +/*
> + * Intel ACPI Component Architecture
> + * AML Disassembler version 20130823-64 [Oct 8 2013]
> + * Copyright (c) 2000 - 2013 Intel Corporation
> + *
> + * Disassembly of MCFG, Thu Nov 21 04:48:06 2013
> + *
> + * ACPI Data Table [MCFG]
> + *
> + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
> + */
> +
> +[000h 0000 4] Signature : "MCFG" [Memory Mapped
> Configuration table]
> +[004h 0004 4] Table Length : 0000003C
> +[008h 0008 1] Revision : 01
> +[009h 0009 1] Checksum : EF
> +[00Ah 0010 6] Oem ID : "BOCHS "
> +[010h 0016 8] Oem Table ID : "BXPCMCFG"
> +[018h 0024 4] Oem Revision : 00000001
> +[01Ch 0028 4] Asl Compiler ID : "BXPC"
> +[020h 0032 4] Asl Compiler Revision : 00000001
> +
> +[024h 0036 8] Reserved : 0000000000000000
> +
> +[02Ch 0044 8] Base Address : 00000000B0000000
> +[034h 0052 2] Segment Group Number : 0000
> +[036h 0054 1] Start Bus Number : 00
> +[037h 0055 1] End Bus Number : FF
> +[038h 0056 4] Reserved : 00000000
> +
> +Raw Table Data: Length 60 (0x3C)
> +
> + 0000: 4D 43 46 47 3C 00 00 00 01 EF 42 4F 43 48 53 20 MCFG<.....BOCHS
> + 0010: 42 58 50 43 4D 43 46 47 01 00 00 00 42 58 50 43 BXPCMCFG....BXPC
> + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 B0 ................
> + 0030: 00 00 00 00 00 00 00 FF 00 00 00 00 ............
> diff --git a/tests/acpi-test-data/q35/SSDT.dsl
> b/tests/acpi-test-data/q35/SSDT.dsl
> new file mode 100644
> index 0000000..0069fca
> --- /dev/null
> +++ b/tests/acpi-test-data/q35/SSDT.dsl
> @@ -0,0 +1,665 @@
> +/*
> + * Intel ACPI Component Architecture
> + * AML Disassembler version 20130823-64 [Oct 8 2013]
> + * Copyright (c) 2000 - 2013 Intel Corporation
> + *
> + * Disassembly of SSDT, Thu Nov 21 04:48:06 2013
> + *
> + * Original Table Header:
> + * Signature "SSDT"
> + * Length 0x00000838 (2104)
> + * Revision 0x01
> + * Checksum 0xC5
> + * OEM ID "BOCHS "
> + * OEM Table ID "BXPCSSDT"
> + * OEM Revision 0x00000001 (1)
> + * Compiler ID "BXPC"
> + * Compiler Version 0x00000001 (1)
> + */
> +DefinitionBlock ("SSDT.aml", "SSDT", 1, "BOCHS ", "BXPCSSDT", 0x00000001)
> +{
> +
> + External (_SB_.PCI0.ISA_, DeviceObj)
> + External (CPEJ, MethodObj) // 2 Arguments
> + External (CPMA, MethodObj) // 1 Arguments
> + External (CPST, MethodObj) // 1 Arguments
> + External (PCEJ, IntObj)
> + External (PCI0, DeviceObj)
> +
> + Scope (\)
> + {
> + Name (P0S, 0xC0000000)
> + Name (P0E, 0xFEBFFFFF)
> + Name (P1V, 0x00)
> + Name (P1S, Buffer (0x08)
> + {
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> + })
> + Name (P1E, Buffer (0x08)
> + {
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> + })
> + Name (P1L, Buffer (0x08)
> + {
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> + })
> + }
> +
> + Scope (\)
> + {
> + Name (_S3, Package (0x04) // _S3_: S3 System State
> + {
> + One,
> + One,
> + Zero,
> + Zero
> + })
> + Name (_S4, Package (0x04) // _S4_: S4 System State
> + {
> + 0x00,
> + 0x00,
> + Zero,
> + Zero
> + })
> + Name (_S5, Package (0x04) // _S5_: S5 System State
> + {
> + Zero,
> + Zero,
> + Zero,
> + Zero
> + })
> + }
> +
> + Scope (\_SB.PCI0.ISA)
> + {
> + Device (PEVT)
> + {
> + Name (_HID, "QEMU0001") // _HID: Hardware ID
> + Name (PEST, 0x0000)
> + OperationRegion (PEOR, SystemIO, PEST, One)
> + Field (PEOR, ByteAcc, NoLock, Preserve)
> + {
> + PEPT, 8
> + }
> +
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Store (PEST, Local0)
> + If (LEqual (Local0, Zero))
> + {
> + Return (Zero)
> + }
> + Else
> + {
> + Return (0x0F)
> + }
> + }
> +
> + Method (RDPT, 0, NotSerialized)
> + {
> + Store (PEPT, Local0)
> + Return (Local0)
> + }
> +
> + Method (WRPT, 1, NotSerialized)
> + {
> + Store (Arg0, PEPT)
> + }
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
> + {
> + IO (Decode16,
> + 0x0000, // Range Minimum
> + 0x0000, // Range Maximum
> + 0x01, // Alignment
> + 0x01, // Length
> + _Y00)
> + })
> + CreateWordField (_CRS, \_SB.PCI0.ISA.PEVT._Y00._MIN, IOMN) //
> _MIN: Minimum Base Address
> + CreateWordField (_CRS, \_SB.PCI0.ISA.PEVT._Y00._MAX, IOMX) //
> _MAX: Maximum Base Address
> + Method (_INI, 0, NotSerialized) // _INI: Initialize
> + {
> + Store (PEST, IOMN)
> + Store (PEST, IOMX)
> + }
> + }
> + }
> +
> + Scope (_SB)
> + {
> + Processor (CP00, 0x00, 0x00000000, 0x00)
> + {
> + Name (ID, 0x00)
> + Name (_HID, "ACPI0007") // _HID: Hardware ID
> + Method (_MAT, 0, NotSerialized) // _MAT: Multiple APIC Table
> Entry
> + {
> + Return (CPMA (ID))
> + }
> +
> + Method (_STA, 0, NotSerialized) // _STA: Status
> + {
> + Return (CPST (ID))
> + }
> +
> + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
> + {
> + CPEJ (ID, Arg0)
> + }
> + }
> +
> + Method (NTFY, 2, NotSerialized)
> + {
> + If (LEqual (Arg0, 0x00))
> + {
> + Notify (CP00, Arg1)
> + }
> + }
> +
> + Name (CPON, Package (0x01)
> + {
> + One
> + })
> + Scope (PCI0)
> + {
> + Device (S01)
> + {
> + Name (_SUN, 0x01) // _SUN: Slot User Number
> + Name (_ADR, 0x00010000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S02)
> + {
> + Name (_SUN, 0x02) // _SUN: Slot User Number
> + Name (_ADR, 0x00020000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S03)
> + {
> + Name (_SUN, 0x03) // _SUN: Slot User Number
> + Name (_ADR, 0x00030000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S04)
> + {
> + Name (_SUN, 0x04) // _SUN: Slot User Number
> + Name (_ADR, 0x00040000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S05)
> + {
> + Name (_SUN, 0x05) // _SUN: Slot User Number
> + Name (_ADR, 0x00050000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S06)
> + {
> + Name (_SUN, 0x06) // _SUN: Slot User Number
> + Name (_ADR, 0x00060000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S07)
> + {
> + Name (_SUN, 0x07) // _SUN: Slot User Number
> + Name (_ADR, 0x00070000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S08)
> + {
> + Name (_SUN, 0x08) // _SUN: Slot User Number
> + Name (_ADR, 0x00080000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S09)
> + {
> + Name (_SUN, 0x09) // _SUN: Slot User Number
> + Name (_ADR, 0x00090000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S0A)
> + {
> + Name (_SUN, 0x0A) // _SUN: Slot User Number
> + Name (_ADR, 0x000A0000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S0B)
> + {
> + Name (_SUN, 0x0B) // _SUN: Slot User Number
> + Name (_ADR, 0x000B0000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S0C)
> + {
> + Name (_SUN, 0x0C) // _SUN: Slot User Number
> + Name (_ADR, 0x000C0000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S0D)
> + {
> + Name (_SUN, 0x0D) // _SUN: Slot User Number
> + Name (_ADR, 0x000D0000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S0E)
> + {
> + Name (_SUN, 0x0E) // _SUN: Slot User Number
> + Name (_ADR, 0x000E0000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S0F)
> + {
> + Name (_SUN, 0x0F) // _SUN: Slot User Number
> + Name (_ADR, 0x000F0000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S10)
> + {
> + Name (_SUN, 0x10) // _SUN: Slot User Number
> + Name (_ADR, 0x00100000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S11)
> + {
> + Name (_SUN, 0x11) // _SUN: Slot User Number
> + Name (_ADR, 0x00110000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S12)
> + {
> + Name (_SUN, 0x12) // _SUN: Slot User Number
> + Name (_ADR, 0x00120000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S13)
> + {
> + Name (_SUN, 0x13) // _SUN: Slot User Number
> + Name (_ADR, 0x00130000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S14)
> + {
> + Name (_SUN, 0x14) // _SUN: Slot User Number
> + Name (_ADR, 0x00140000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S15)
> + {
> + Name (_SUN, 0x15) // _SUN: Slot User Number
> + Name (_ADR, 0x00150000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S16)
> + {
> + Name (_SUN, 0x16) // _SUN: Slot User Number
> + Name (_ADR, 0x00160000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S17)
> + {
> + Name (_SUN, 0x17) // _SUN: Slot User Number
> + Name (_ADR, 0x00170000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S18)
> + {
> + Name (_SUN, 0x18) // _SUN: Slot User Number
> + Name (_ADR, 0x00180000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S19)
> + {
> + Name (_SUN, 0x19) // _SUN: Slot User Number
> + Name (_ADR, 0x00190000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S1A)
> + {
> + Name (_SUN, 0x1A) // _SUN: Slot User Number
> + Name (_ADR, 0x001A0000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S1B)
> + {
> + Name (_SUN, 0x1B) // _SUN: Slot User Number
> + Name (_ADR, 0x001B0000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S1C)
> + {
> + Name (_SUN, 0x1C) // _SUN: Slot User Number
> + Name (_ADR, 0x001C0000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S1D)
> + {
> + Name (_SUN, 0x1D) // _SUN: Slot User Number
> + Name (_ADR, 0x001D0000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S1E)
> + {
> + Name (_SUN, 0x1E) // _SUN: Slot User Number
> + Name (_ADR, 0x001E0000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Device (S1F)
> + {
> + Name (_SUN, 0x1F) // _SUN: Slot User Number
> + Name (_ADR, 0x001F0000) // _ADR: Address
> + Method (EJ0, 1, NotSerialized)
> + {
> + Return (PCEJ)
> + _SUN
> + }
> + }
> +
> + Method (PCNT, 2, NotSerialized)
> + {
> + If (LEqual (Arg0, 0x01))
> + {
> + Notify (S01, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x02))
> + {
> + Notify (S02, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x03))
> + {
> + Notify (S03, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x04))
> + {
> + Notify (S04, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x05))
> + {
> + Notify (S05, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x06))
> + {
> + Notify (S06, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x07))
> + {
> + Notify (S07, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x08))
> + {
> + Notify (S08, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x09))
> + {
> + Notify (S09, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x0A))
> + {
> + Notify (S0A, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x0B))
> + {
> + Notify (S0B, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x0C))
> + {
> + Notify (S0C, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x0D))
> + {
> + Notify (S0D, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x0E))
> + {
> + Notify (S0E, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x0F))
> + {
> + Notify (S0F, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x10))
> + {
> + Notify (S10, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x11))
> + {
> + Notify (S11, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x12))
> + {
> + Notify (S12, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x13))
> + {
> + Notify (S13, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x14))
> + {
> + Notify (S14, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x15))
> + {
> + Notify (S15, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x16))
> + {
> + Notify (S16, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x17))
> + {
> + Notify (S17, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x18))
> + {
> + Notify (S18, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x19))
> + {
> + Notify (S19, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x1A))
> + {
> + Notify (S1A, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x1B))
> + {
> + Notify (S1B, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x1C))
> + {
> + Notify (S1C, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x1D))
> + {
> + Notify (S1D, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x1E))
> + {
> + Notify (S1E, Arg1)
> + }
> +
> + If (LEqual (Arg0, 0x1F))
> + {
> + Notify (S1F, Arg1)
> + }
> + }
> + }
> + }
> +}
> +
> --
> 1.8.3.1
- Re: [Qemu-devel] [PATCH for-1.7 3/5] acpi unit-test: add test files,
Michael S. Tsirkin <=