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[Qemu-devel] [PATCH v3 3/4] tcg/optimize: improve known-zero bits for 32
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH v3 3/4] tcg/optimize: improve known-zero bits for 32-bit ops |
Date: |
Wed, 11 Dec 2013 15:13:05 +0100 |
The shl_i32 op might set some bits of the unused 32 high bits of the
mask. Fix that by clearing the unused 32 high bits for all 32-bit ops
except load/store which operate on tl values.
Cc: Paolo Bonzini <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
---
tcg/optimize.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 342c6e5..e14b564 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -787,6 +787,12 @@ static TCGArg *tcg_constant_folding(TCGContext *s,
uint16_t *tcg_opc_ptr,
break;
}
+ /* 32-bit ops (non 64-bit ops and non load/store ops) generate 32-bit
+ results */
+ if (!(tcg_op_defs[op].flags & (TCG_OPF_CALL_CLOBBER | TCG_OPF_64BIT)))
{
+ mask &= 0xffffffffu;
+ }
+
if (mask == 0) {
assert(def->nb_oargs == 1);
s->gen_opc_buf[op_index] = op_to_movi(op);
--
1.7.10.4