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[Qemu-devel] [PULL 04/62] return status for each NOR flash device
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 04/62] return status for each NOR flash device |
Date: |
Tue, 17 Dec 2013 20:28:22 +0000 |
From: Roy Franz <address@hidden>
Now that we know how wide each flash device that makes up the bank is,
return status for each device in the bank. Leave existing code
that treats 32 bit wide banks as composed of two 16 bit devices as otherwise
we may break configurations that do not set the device_width propery.
Signed-off-by: Roy Franz <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/block/pflash_cfi01.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index a458ad6..82a2519 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -193,9 +193,20 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
case 0x60: /* Block /un)lock */
case 0x70: /* Status Register */
case 0xe8: /* Write block */
- /* Status register read */
+ /* Status register read. Return status from each device in
+ * bank.
+ */
ret = pfl->status;
- if (width > 2) {
+ if (pfl->device_width && width > pfl->device_width) {
+ int shift = pfl->device_width * 8;
+ while (shift + pfl->device_width * 8 <= width * 8) {
+ ret |= pfl->status << shift;
+ shift += pfl->device_width * 8;
+ }
+ } else if (!pfl->device_width && width > 2) {
+ /* Handle 32 bit flash cases where device width is not
+ * set. (Existing behavior before device width added.)
+ */
ret |= pfl->status << 16;
}
DPRINTF("%s: status %x\n", __func__, ret);
--
1.8.5
- [Qemu-devel] [PULL 22/62] configure: Enable KVM for aarch64 host/target combination, (continued)
- [Qemu-devel] [PULL 22/62] configure: Enable KVM for aarch64 host/target combination, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 26/62] target-arm: Split A64 from A32/T32 gen_intermediate_code_internal(), Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 02/62] rename pflash_t member width to bank_width, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 24/62] hw/arm/boot: Add boot support for AArch64 processor, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 13/62] arm/highbank: Fix CBAR initialisation, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 03/62] Add device-width property to pflash_cfi01, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 23/62] hw/arm/boot: Allow easier swapping in of different loader code, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 21/62] target-arm: Add minimal KVM AArch64 support, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 07/62] Fix CFI query responses for NOR flash, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 14/62] arm/xilinx_zynq: Use object_new() rather than cpu_arm_init(), Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 04/62] return status for each NOR flash device,
Peter Maydell <=
- [Qemu-devel] [PULL 12/62] arm/highbank: Use object_new() rather than cpu_arm_init(), Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 05/62] Set proper device-width for vexpress flash, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 60/62] hw/arm: add allwinner a10 SoC support, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 18/62] ARM: arm_cpu_reset: make it possible to use high vectors for reset_exc, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 11/62] target-arm/cpu: Convert reset CBAR to a property, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 20/62] target-arm: Clean up handling of AArch64 PSTATE, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 17/62] ARM: cpu: add "reset_hivecs" property, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 09/62] target-arm/helper.c: Allow cp15.c15 dummy override, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 06/62] Add max device width parameter for NOR devices, Peter Maydell, 2013/12/17
- [Qemu-devel] [PULL 01/62] target-arm: add support for v8 AES instructions, Peter Maydell, 2013/12/17