[Qemu-devel] [PATCH 0/8] target-sh4: optimizations and cleanups

[Aurelien Jarno]

This patchset improves the SH4 emulation by using the lately added
TCG instructions, namely add2, sub2 and movcond. For that the T, Q and
M bits are split out from the SR register.

The last two patches are doing cleanup in the code.

Aurelien Jarno (8):
  target-sh4: use bit number for SR constants
  target-sh4: Split out T from SR
  target-sh4: optimize addc using add2
  target-sh4: optimize subc using sub2
  target-sh4: optimize negc using add2 and sub2
  target-sh4: split out Q and M from of SR and optimize div1
  target-sh4: factorize fmov implementation
  target-sh4: remove dead code

 target-sh4/cpu.c       |    3 +-
 target-sh4/cpu.h       |   51 +++++---
 target-sh4/gdbstub.c   |    8 +-
 target-sh4/helper.c    |   29 ++---
 target-sh4/helper.h    |    1 -
 target-sh4/op_helper.c |  148 +----------------------
 target-sh4/translate.c |  316 +++++++++++++++++++++++++-----------------------
 7 files changed, 226 insertions(+), 330 deletions(-)

-- 
1.7.10.4