Re: [Qemu-devel] QEMU ARM946 emulation, DIGIC, and MPU fault handling

[Peter Maydell]

On 23 January 2014 23:36, Andreas Färber <address@hidden> wrote:
> Am 23.01.2014 23:25, schrieb Peter Maydell:
>> This bug would also affect the ARMv7M CPU (Cortex-M3) we emulate,
>> except that as far as I can tell we don't implement its MPU interface at all!
>> (it uses memory mapped registers rather than cp15 regs, and they just
>> aren't wired up in armv7m_nvic.c...)
>
> That matches my memories of investigating Cortex-R4. There is some MPU
> code present somewhere, but it appeared to be for some older CPU,
> possibly OMAP2.

The only CPUs with an MPU we support are the 946 and the M3.
(The OMAP SoCs have always had MPUs: OMAP1 was a 926 and
OMAP2 an 1136.)

Apparently in theory the Integrator/CP board can handle a 946.
I guess it would have to be running uClinux.

thanks
-- PMM