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[Qemu-devel] [PULL v2 32/35] acpi: Fix PCI hole handling on build_srat()
From: |
Michael S. Tsirkin |
Subject: |
[Qemu-devel] [PULL v2 32/35] acpi: Fix PCI hole handling on build_srat() |
Date: |
Sun, 26 Jan 2014 18:07:04 +0200 |
From: Eduardo Habkost <address@hidden>
The original SeaBIOS code used the RamSize variable, that was used by
SeaBIOS for the size of RAM below 4GB, not for all RAM. When copied to
QEMU, the code was changed to use the full RAM size, and this broke the
build_srat() code that handles the PCI hole.
Change build_srat() to use ram_size_below_4g instead of ram_size, to
restore the original behavior from SeaBIOS.
Signed-off-by: Eduardo Habkost <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
---
hw/i386/acpi-build.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 9cd3d0e..50e83f3 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1080,16 +1080,16 @@ build_srat(GArray *table_data, GArray *linker,
next_base = mem_base + mem_len;
/* Cut out the ACPI_PCI hole */
- if (mem_base <= guest_info->ram_size &&
- next_base > guest_info->ram_size) {
- mem_len -= next_base - guest_info->ram_size;
+ if (mem_base <= guest_info->ram_size_below_4g &&
+ next_base > guest_info->ram_size_below_4g) {
+ mem_len -= next_base - guest_info->ram_size_below_4g;
if (mem_len > 0) {
numamem = acpi_data_push(table_data, sizeof *numamem);
acpi_build_srat_memory(numamem, mem_base, mem_len, i-1, 1);
}
mem_base = 1ULL << 32;
- mem_len = next_base - guest_info->ram_size;
- next_base += (1ULL << 32) - guest_info->ram_size;
+ mem_len = next_base - guest_info->ram_size_below_4g;
+ next_base += (1ULL << 32) - guest_info->ram_size_below_4g;
}
numamem = acpi_data_push(table_data, sizeof *numamem);
acpi_build_srat_memory(numamem, mem_base, mem_len, i - 1, 1);
--
MST
- [Qemu-devel] [PULL v2 22/35] acpi: ich9: add CPU hotplug handling to Q35 machine, (continued)
- [Qemu-devel] [PULL v2 22/35] acpi: ich9: add CPU hotplug handling to Q35 machine, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 23/35] pc: set PRST base in DSDT depending on chipset, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 24/35] pc: PIIX DSDT: exclude CPU/PCI hotplug & GPE0 IO range from PCI bus resources, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 25/35] pc: Q35 DSDT: exclude CPU hotplug IO range from PCI bus resources, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 26/35] pc: ACPI: expose PRST IO range via _CRS, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 27/35] pc: ACPI: unify source of CPU hotplug IO base/len, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 28/35] pc: ACPI: update acpi-dsdt.hex.generated q35-acpi-dsdt.hex.generated, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 29/35] acpi-test: update expected AML since recent changes, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 30/35] hw/pci: fix error flow in pci multifunction init, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 31/35] pc: Save size of RAM below 4GB, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 32/35] acpi: Fix PCI hole handling on build_srat(),
Michael S. Tsirkin <=
- [Qemu-devel] [PULL v2 33/35] q35: gigabyte alignment for ram, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 34/35] q35: document gigabyte_align, Michael S. Tsirkin, 2014/01/26
- [Qemu-devel] [PULL v2 35/35] MAINTAINERS: add self as virtio co-maintainer, Michael S. Tsirkin, 2014/01/26
- Re: [Qemu-devel] [PULL v2 00/35] acpi, pci, pc, virtio fixes and enhancements, Michael S. Tsirkin, 2014/01/28
- Re: [Qemu-devel] [PULL v2 00/35] acpi, pci, pc, virtio fixes and enhancements, Peter Maydell, 2014/01/29
- Re: [Qemu-devel] [PULL v2 00/35] acpi, pci, pc, virtio fixes and enhancements, Peter Maydell, 2014/01/31