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[Qemu-devel] [PULL 34/38] kvm: Introduce kvm_arch_irqchip_create
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 34/38] kvm: Introduce kvm_arch_irqchip_create |
Date: |
Wed, 29 Jan 2014 13:40:01 +0000 |
From: Christoffer Dall <address@hidden>
Introduce kvm_arch_irqchip_create an arch-specific hook in preparation
for architecture-specific use of the device control API to create IRQ
chips.
Following patches will implement the ARM irqchip create method to prefer
the device control API over the older KVM_CREATE_IRQCHIP API.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Christoffer Dall <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
include/sysemu/kvm.h | 12 ++++++++++++
kvm-all.c | 11 +++++++++--
stubs/Makefile.objs | 1 +
stubs/kvm.c | 7 +++++++
4 files changed, 29 insertions(+), 2 deletions(-)
create mode 100644 stubs/kvm.c
diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h
index 3b25f27..e4e43b8 100644
--- a/include/sysemu/kvm.h
+++ b/include/sysemu/kvm.h
@@ -319,4 +319,16 @@ int kvm_irqchip_remove_irqfd_notifier(KVMState *s,
EventNotifier *n, int virq);
void kvm_pc_gsi_handler(void *opaque, int n, int level);
void kvm_pc_setup_irq_routing(bool pci_enabled);
void kvm_init_irq_routing(KVMState *s);
+
+/**
+ * kvm_arch_irqchip_create:
+ * @KVMState: The KVMState pointer
+ *
+ * Allow architectures to create an in-kernel irq chip themselves.
+ *
+ * Returns: < 0: error
+ * 0: irq chip was not created
+ * > 0: irq chip was created
+ */
+int kvm_arch_irqchip_create(KVMState *s);
#endif
diff --git a/kvm-all.c b/kvm-all.c
index a3fb8de..a890152 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -1298,10 +1298,17 @@ static int kvm_irqchip_create(KVMState *s)
return 0;
}
- ret = kvm_vm_ioctl(s, KVM_CREATE_IRQCHIP);
+ /* First probe and see if there's a arch-specific hook to create the
+ * in-kernel irqchip for us */
+ ret = kvm_arch_irqchip_create(s);
if (ret < 0) {
- fprintf(stderr, "Create kernel irqchip failed\n");
return ret;
+ } else if (ret == 0) {
+ ret = kvm_vm_ioctl(s, KVM_CREATE_IRQCHIP);
+ if (ret < 0) {
+ fprintf(stderr, "Create kernel irqchip failed\n");
+ return ret;
+ }
}
kvm_kernel_irqchip = true;
diff --git a/stubs/Makefile.objs b/stubs/Makefile.objs
index df92fe5..df3aa7a 100644
--- a/stubs/Makefile.objs
+++ b/stubs/Makefile.objs
@@ -27,3 +27,4 @@ stub-obj-y += vm-stop.o
stub-obj-y += vmstate.o
stub-obj-$(CONFIG_WIN32) += fd-register.o
stub-obj-y += cpus.o
+stub-obj-y += kvm.o
diff --git a/stubs/kvm.c b/stubs/kvm.c
new file mode 100644
index 0000000..e7c60b6
--- /dev/null
+++ b/stubs/kvm.c
@@ -0,0 +1,7 @@
+#include "qemu-common.h"
+#include "sysemu/kvm.h"
+
+int kvm_arch_irqchip_create(KVMState *s)
+{
+ return 0;
+}
--
1.8.5
- [Qemu-devel] [PULL 22/38] target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP, VRINTM, VRINTZ, (continued)
- [Qemu-devel] [PULL 22/38] target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP, VRINTM, VRINTZ, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 11/38] hw/arm/boot: Don't set up ATAGS for autogenerated dtb booting, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 37/38] arm_gic: Introduce define for GIC_NR_SGIS, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 36/38] arm: vgic device control api support, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 35/38] kvm: Common device control API functions, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 38/38] arm_gic: Fix GICD_ICPENDR and GICD_ISPENDR writes, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 06/38] target-arm: A64: Add SIMD ZIP/UZP/TRN, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 16/38] target-arm: Add AArch32 FP VRINTA, VRINTN, VRINTP and VRINTM, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 33/38] linux-headers: Update from Linus' master ba635f8, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 09/38] target-arm: A64: Add SIMD modified immediate group, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 34/38] kvm: Introduce kvm_arch_irqchip_create,
Peter Maydell <=
- [Qemu-devel] [PULL 32/38] target-arm: A64: Add SIMD shift by immediate, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 24/38] target-arm: Add AArch32 SIMD VCVTA, VCVTN, VCVTP and VCVTM, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 27/38] target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 17/38] target-arm: Add support for AArch32 FP VRINTR, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 31/38] target-arm: A64: Add simple SIMD 3-same floating point ops, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 29/38] target-arm: A64: Add logic ops from SIMD 3 same group, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 30/38] target-arm: A64: Add integer ops from SIMD 3-same group, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 28/38] target-arm: A64: Add top level decode for SIMD 3-same group, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 18/38] target-arm: Add support for AArch32 FP VRINTZ, Peter Maydell, 2014/01/29
- [Qemu-devel] [PULL 01/38] target-arm: A64: Add SIMD ld/st multiple, Peter Maydell, 2014/01/29