[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 03/45] hw/timer/arm_timer: Avoid array overrun for ba
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 03/45] hw/timer/arm_timer: Avoid array overrun for bad addresses |
Date: |
Wed, 26 Feb 2014 18:01:53 +0000 |
The integrator's timer read/write functions log an error for
bad addresses in guest accesses, but were falling through and
using an out of bounds array index rather than returning early.
Fix this.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Paolo Bonzini <address@hidden>
Reviewed-by: Andreas Färber <address@hidden>
Message-id: address@hidden
Cc: address@hidden
---
hw/timer/arm_timer.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c
index a47afde..fb0a45c 100644
--- a/hw/timer/arm_timer.c
+++ b/hw/timer/arm_timer.c
@@ -320,6 +320,7 @@ static uint64_t icp_pit_read(void *opaque, hwaddr offset,
n = offset >> 8;
if (n > 2) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad timer %d\n", __func__, n);
+ return 0;
}
return arm_timer_read(s->timer[n], offset & 0xff);
@@ -334,6 +335,7 @@ static void icp_pit_write(void *opaque, hwaddr offset,
n = offset >> 8;
if (n > 2) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad timer %d\n", __func__, n);
+ return;
}
arm_timer_write(s->timer[n], offset & 0xff, value);
--
1.9.0
- [Qemu-devel] [PULL 28/45] target-arm: Implement AArch64 ID and feature registers, (continued)
- [Qemu-devel] [PULL 28/45] target-arm: Implement AArch64 ID and feature registers, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 26/45] target-arm: Implement AArch64 MPIDR, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 08/45] hw/intc/arm_gic: Fix GIC_SET_LEVEL, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 32/45] target-arm: A64: Implement WFI, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 19/45] target-arm: Implement AArch64 TLB invalidate ops, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 02/45] hw/net/stellaris_enet: Avoid unintended sign extension, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 01/45] hw/misc/arm_sysctl: Fix bad boundary check on mb clock accesses, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 09/45] linux-headers: Update from v3.14-rc3, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 21/45] target-arm: Implement AArch64 memory attribute registers, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 18/45] target-arm: Implement AArch64 cache invalidate/clean ops, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 03/45] hw/timer/arm_timer: Avoid array overrun for bad addresses,
Peter Maydell <=
- [Qemu-devel] [PULL 07/45] target-arm: Load correct access bits from ARMv5 level 2 page table descriptors, Peter Maydell, 2014/02/26
- [Qemu-devel] [PULL 06/45] hw/arm/musicpal: Remove nonexistent CDTP2, CDTP3 registers, Peter Maydell, 2014/02/26
- Re: [Qemu-devel] [PULL 00/45] target-arm queue, Peter Maydell, 2014/02/27