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[Qemu-devel] [PULL 2.0 15/15] PPC: Add l1 cache sizes for 970 and above
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PULL 2.0 15/15] PPC: Add l1 cache sizes for 970 and above systems |
Date: |
Tue, 8 Apr 2014 11:31:54 +0200 |
Book3s_64 guests expect the L1 cache size in device tree, so let's give
them proper values for all CPU types we support.
This fixes a "not compliant" warning with sles11 guests on -M pseries for me.
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/translate_init.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index d07e186..4d94015 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -6699,6 +6699,8 @@ POWERPC_FAMILY(970)(ObjectClass *oc, void *data)
pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE |
POWERPC_FLAG_BE | POWERPC_FLAG_PMM |
POWERPC_FLAG_BUS_CLK;
+ pcc->l1_dcache_size = 0x8000;
+ pcc->l1_icache_size = 0x10000;
}
static int check_pow_970FX (CPUPPCState *env)
@@ -6791,6 +6793,8 @@ POWERPC_FAMILY(970FX)(ObjectClass *oc, void *data)
pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE |
POWERPC_FLAG_BE | POWERPC_FLAG_PMM |
POWERPC_FLAG_BUS_CLK;
+ pcc->l1_dcache_size = 0x8000;
+ pcc->l1_icache_size = 0x10000;
}
static int check_pow_970MP (CPUPPCState *env)
@@ -6877,6 +6881,8 @@ POWERPC_FAMILY(970MP)(ObjectClass *oc, void *data)
pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE |
POWERPC_FLAG_BE | POWERPC_FLAG_PMM |
POWERPC_FLAG_BUS_CLK;
+ pcc->l1_dcache_size = 0x8000;
+ pcc->l1_icache_size = 0x10000;
}
static void init_proc_power5plus(CPUPPCState *env)
@@ -6967,6 +6973,8 @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data)
pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE |
POWERPC_FLAG_BE | POWERPC_FLAG_PMM |
POWERPC_FLAG_BUS_CLK;
+ pcc->l1_dcache_size = 0x8000;
+ pcc->l1_icache_size = 0x10000;
}
static void init_proc_POWER7 (CPUPPCState *env)
--
1.8.1.4
- [Qemu-devel] [PULL 2.0 05/15] target-ppc: Define Endian-Correct Accessors for VSR Field Access, (continued)
- [Qemu-devel] [PULL 2.0 05/15] target-ppc: Define Endian-Correct Accessors for VSR Field Access, Alexander Graf, 2014/04/08
- [Qemu-devel] [PULL 2.0 01/15] PPC: E500: Set PIR default reset value rather than SPR value, Alexander Graf, 2014/04/08
- [Qemu-devel] [PULL 2.0 03/15] softfloat: Introduce float32_to_uint64_round_to_zero, Alexander Graf, 2014/04/08
- [Qemu-devel] [PULL 2.0 06/15] target-ppc: Correct LE Host Inversion of Lower VSRs, Alexander Graf, 2014/04/08
- [Qemu-devel] [PULL 2.0 13/15] PPC: Only enter MSR_POW when no interrupts pending, Alexander Graf, 2014/04/08
- [Qemu-devel] [PULL 2.0 09/15] target-ppc: Correct VSX FP to FP Conversions, Alexander Graf, 2014/04/08
- [Qemu-devel] [PULL 2.0 12/15] PPC: Clean up DECR implementation, Alexander Graf, 2014/04/08
- [Qemu-devel] [PULL 2.0 07/15] target-ppc: Correct Simple VSR LE Host Inversions, Alexander Graf, 2014/04/08
- [Qemu-devel] [PULL 2.0 10/15] target-ppc: Correct VSX FP to Integer Conversion, Alexander Graf, 2014/04/08
- [Qemu-devel] [PULL 2.0 08/15] target-ppc: Correct VSX Scalar Compares, Alexander Graf, 2014/04/08
- [Qemu-devel] [PULL 2.0 15/15] PPC: Add l1 cache sizes for 970 and above systems,
Alexander Graf <=
- [Qemu-devel] [PULL 2.0 14/15] ppce500_spin: Initialize struct properly, Alexander Graf, 2014/04/08
- [Qemu-devel] [PULL 2.0 11/15] target-ppc: Correct VSX Integer to FP Conversion, Alexander Graf, 2014/04/08
- [Qemu-devel] [PULL 2.0 04/15] target-ppc: Bug: VSX Convert to Integer Should Truncate, Alexander Graf, 2014/04/08
- [Qemu-devel] [PULL 2.0 02/15] pseries: Update SLOF firmware image to qemu-slof-20140404, Alexander Graf, 2014/04/08
- Re: [Qemu-devel] [PULL 2.0 00/15] ppc patch queue 2014-04-08 for 2.0, Peter Maydell, 2014/04/08