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[Qemu-devel] [PATCH v4 22/25] tcg-aarch64: Merge aarch64_ldst_get_data/t
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v4 22/25] tcg-aarch64: Merge aarch64_ldst_get_data/type into tcg_out_op |
Date: |
Fri, 11 Apr 2014 08:40:24 -0700 |
Reviewed-by: Claudio Fontana <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/aarch64/tcg-target.c | 115 +++++++++++++----------------------------------
1 file changed, 32 insertions(+), 83 deletions(-)
diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c
index 0846835..7f72df5 100644
--- a/tcg/aarch64/tcg-target.c
+++ b/tcg/aarch64/tcg-target.c
@@ -356,78 +356,6 @@ typedef enum {
I3510_ANDS = 0x6a000000,
} AArch64Insn;
-static inline enum aarch64_ldst_op_data
-aarch64_ldst_get_data(TCGOpcode tcg_op)
-{
- switch (tcg_op) {
- case INDEX_op_ld8u_i32:
- case INDEX_op_ld8s_i32:
- case INDEX_op_ld8u_i64:
- case INDEX_op_ld8s_i64:
- case INDEX_op_st8_i32:
- case INDEX_op_st8_i64:
- return LDST_8;
-
- case INDEX_op_ld16u_i32:
- case INDEX_op_ld16s_i32:
- case INDEX_op_ld16u_i64:
- case INDEX_op_ld16s_i64:
- case INDEX_op_st16_i32:
- case INDEX_op_st16_i64:
- return LDST_16;
-
- case INDEX_op_ld_i32:
- case INDEX_op_st_i32:
- case INDEX_op_ld32u_i64:
- case INDEX_op_ld32s_i64:
- case INDEX_op_st32_i64:
- return LDST_32;
-
- case INDEX_op_ld_i64:
- case INDEX_op_st_i64:
- return LDST_64;
-
- default:
- tcg_abort();
- }
-}
-
-static inline enum aarch64_ldst_op_type
-aarch64_ldst_get_type(TCGOpcode tcg_op)
-{
- switch (tcg_op) {
- case INDEX_op_st8_i32:
- case INDEX_op_st16_i32:
- case INDEX_op_st8_i64:
- case INDEX_op_st16_i64:
- case INDEX_op_st_i32:
- case INDEX_op_st32_i64:
- case INDEX_op_st_i64:
- return LDST_ST;
-
- case INDEX_op_ld8u_i32:
- case INDEX_op_ld16u_i32:
- case INDEX_op_ld8u_i64:
- case INDEX_op_ld16u_i64:
- case INDEX_op_ld_i32:
- case INDEX_op_ld32u_i64:
- case INDEX_op_ld_i64:
- return LDST_LD;
-
- case INDEX_op_ld8s_i32:
- case INDEX_op_ld16s_i32:
- return LDST_LD_S_W;
-
- case INDEX_op_ld8s_i64:
- case INDEX_op_ld16s_i64:
- case INDEX_op_ld32s_i64:
- return LDST_LD_S_X;
-
- default:
- tcg_abort();
- }
-}
-
static inline uint32_t tcg_in32(TCGContext *s)
{
uint32_t v = *(uint32_t *)s->code_ptr;
@@ -1372,30 +1300,51 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_goto_label(s, a0);
break;
- case INDEX_op_ld_i32:
- case INDEX_op_ld_i64:
case INDEX_op_ld8u_i32:
- case INDEX_op_ld8s_i32:
- case INDEX_op_ld16u_i32:
- case INDEX_op_ld16s_i32:
case INDEX_op_ld8u_i64:
+ tcg_out_ldst(s, LDST_8, LDST_LD, a0, a1, a2);
+ break;
+ case INDEX_op_ld8s_i32:
+ tcg_out_ldst(s, LDST_8, LDST_LD_S_W, a0, a1, a2);
+ break;
case INDEX_op_ld8s_i64:
+ tcg_out_ldst(s, LDST_8, LDST_LD_S_X, a0, a1, a2);
+ break;
+ case INDEX_op_ld16u_i32:
case INDEX_op_ld16u_i64:
+ tcg_out_ldst(s, LDST_16, LDST_LD, a0, a1, a2);
+ break;
+ case INDEX_op_ld16s_i32:
+ tcg_out_ldst(s, LDST_16, LDST_LD_S_W, a0, a1, a2);
+ break;
case INDEX_op_ld16s_i64:
+ tcg_out_ldst(s, LDST_16, LDST_LD_S_X, a0, a1, a2);
+ break;
+ case INDEX_op_ld_i32:
case INDEX_op_ld32u_i64:
+ tcg_out_ldst(s, LDST_32, LDST_LD, a0, a1, a2);
+ break;
case INDEX_op_ld32s_i64:
- tcg_out_ldst(s, aarch64_ldst_get_data(opc), aarch64_ldst_get_type(opc),
- a0, a1, a2);
+ tcg_out_ldst(s, LDST_32, LDST_LD_S_X, a0, a1, a2);
break;
- case INDEX_op_st_i32:
- case INDEX_op_st_i64:
+ case INDEX_op_ld_i64:
+ tcg_out_ldst(s, LDST_64, LDST_LD, a0, a1, a2);
+ break;
+
case INDEX_op_st8_i32:
case INDEX_op_st8_i64:
+ tcg_out_ldst(s, LDST_8, LDST_ST, REG0(0), a1, a2);
+ break;
case INDEX_op_st16_i32:
case INDEX_op_st16_i64:
+ tcg_out_ldst(s, LDST_16, LDST_ST, REG0(0), a1, a2);
+ break;
+ case INDEX_op_st_i32:
case INDEX_op_st32_i64:
- tcg_out_ldst(s, aarch64_ldst_get_data(opc), aarch64_ldst_get_type(opc),
- REG0(0), a1, a2);
+ tcg_out_ldst(s, LDST_32, LDST_ST, REG0(0), a1, a2);
+ break;
+ case INDEX_op_st_i64:
+ tcg_out_ldst(s, LDST_64, LDST_ST, REG0(0), a1, a2);
break;
case INDEX_op_add_i32:
--
1.9.0
- [Qemu-devel] [PATCH v4 13/25] tcg-aarch64: Implement tcg_register_jit, (continued)
- [Qemu-devel] [PATCH v4 13/25] tcg-aarch64: Implement tcg_register_jit, Richard Henderson, 2014/04/11
- [Qemu-devel] [PATCH v4 14/25] tcg-aarch64: Avoid add with zero in tlb load, Richard Henderson, 2014/04/11
- [Qemu-devel] [PATCH v4 15/25] tcg-aarch64: Use tcg_out_call for qemu_ld/st, Richard Henderson, 2014/04/11
- [Qemu-devel] [PATCH v4 16/25] tcg-aarch64: Use ADR to pass the return address to the ld/st helpers, Richard Henderson, 2014/04/11
- [Qemu-devel] [PATCH v4 17/25] tcg-aarch64: Use TCGMemOp in qemu_ld/st, Richard Henderson, 2014/04/11
- [Qemu-devel] [PATCH v4 18/25] tcg-aarch64: Pass qemu_ld/st arguments directly, Richard Henderson, 2014/04/11
- [Qemu-devel] [PATCH v4 19/25] tcg-aarch64: Implement TCG_TARGET_HAS_new_ldst, Richard Henderson, 2014/04/11
- [Qemu-devel] [PATCH v4 20/25] tcg-aarch64: Support stores of zero, Richard Henderson, 2014/04/11
- [Qemu-devel] [PATCH v4 21/25] tcg-aarch64: Introduce tcg_out_insn_3507, Richard Henderson, 2014/04/11
- [Qemu-devel] [PATCH v4 22/25] tcg-aarch64: Merge aarch64_ldst_get_data/type into tcg_out_op,
Richard Henderson <=
- [Qemu-devel] [PATCH v4 24/25] tcg-aarch64: Prefer unsigned offsets before signed offsets for ldst, Richard Henderson, 2014/04/11
- [Qemu-devel] [PATCH v4 23/25] tcg-aarch64: Introduce tcg_out_insn_3312, _3310, _3313, Richard Henderson, 2014/04/11
- [Qemu-devel] [PATCH v4 25/25] tcg-aarch64: Use tcg_out_mov in preference to tcg_out_movr, Richard Henderson, 2014/04/11