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Re: [Qemu-devel] [PATCH v2 1/2] SMBIOS: Fix endian-ness when populating
Re: [Qemu-devel] [PATCH v2 1/2] SMBIOS: Fix endian-ness when populating fields wider than 8-bit
Tue, 13 May 2014 22:32:36 +0200
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On 05/13/14 22:21, Gabriel L. Somlo wrote:
> On Tue, May 13, 2014 at 10:09:45PM +0200, Paolo Bonzini wrote:
>> Il 13/05/2014 20:17, Gabriel L. Somlo ha scritto:
>>> - t->processor_id = smbios_cpuid_version;
>>> - t->processor_id = smbios_cpuid_features;
>>> + t->processor_id = smbios_cpuid_version; /* opaque, no cpu_to_le16 */
>>> + t->processor_id = smbios_cpuid_features; /* opaque, no cpu_to_le16
>> Actually I think these should be subject to cpu_to_le32. They
>> correspond to CPUID values, so they are little-endian 32-bit.
> Right, my comment is wrong, should be "no need for cpu_to_le32()" instead
> of what I said ("no need for cpu_to_le16()")... :)
> Re. why I said "opaque, no need for endianness fix" is because they're
> a straight-through assignment from cpu->env.cpuid_version and
> cpu->env.features[FEAT_1_EDX], respectively. So they're not really
> "numbers" which need endianness adjustment.
> Did I get that wrong ? (I mean, besides the 16 vs. 32 in the comment) ?
See 220.127.116.11 "x86-Class CPUs" in the spec.
> For x86 class CPUs, the field’s format depends on the processor’s
> support of the CPUID instruction. If the instruction is supported,
> the Processor ID field contains two DWORD-formatted values. The first
> (offsets 08h-0Bh) is the EAX value returned by a CPUID instruction
> with input EAX set to 1; the second (offsets 0Ch-0Fh) is the EDX
> value returned by that instruction.
I'm inclined to think that Paolo's right.
[Qemu-devel] [PATCH v2 2/2] SMBIOS: Update Type 0 struct generator for machines >= 2.1, Gabriel L. Somlo, 2014/05/13