Re: [Qemu-devel] [v2 PATCH] target-mips: implement UserLocal Register

[Richard Henderson]

On 05/27/2014 09:46 AM, Petar Jovanovic wrote:
> Can you please add more thoughts on this? Within the same translation block,
> we can have an instruction that alters HWrena (mtc0) and rdwhr instruction 
> that
> will behave differently based on content of HWrena.

The normal way to handle this is to end the translation block whenever we issue
an instruction that could (unpredictably) affect how the TB is translated.

In the mips translator, this is done via "ctx->bstate = BS_STOP".
There are plenty of examples within gen_mtc0 already.


r~